Change in ...coreboot[master]: src/soc/intel/cannonlake: [TEST_ONLY] Disable HECI device

[Aamir Bohra (Code Review)]

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32801

Change subject: src/soc/intel/cannonlake: [TEST_ONLY] Disable HECI device
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src/soc/intel/cannonlake: [TEST_ONLY] Disable HECI device

Change-Id: Ifaa09ef0cee77a15c33dc415f465ac735c0dce2b
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/cannonlake/fsp_params.c
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/32801/1

diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index cc01d10..a2c29b9 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -338,6 +338,10 @@
    params->FastPkgCRampDisableSa = config->FastPkgCRampDisableSa;
    params->FastPkgCRampDisableFivr = config->FastPkgCRampDisableFivr;

+#if CONFIG(SOC_INTEL_COMETLAKE)
+	params->Heci1Disabled = 1;
+#endif
+
    /* Power Optimizer */
    params->PchPwrOptEnable = config->dmipwroptimize;
    params->SataPwrOptEnable = config->satapwroptimize;

Change in ...coreboot[master]: mb/google/hatch: Disable HECI device

[Aamir Bohra (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32801

to look at the new patch set (#4).

Change subject: mb/google/hatch: Disable HECI device
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mb/google/hatch: Disable HECI device

Change-Id: Ifaa09ef0cee77a15c33dc415f465ac735c0dce2b
Signed-off-by: Aamir Bohra 
---
M src/mainboard/google/hatch/variants/baseboard/devicetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/32801/4

Change in ...coreboot[master]: mb/google/hatch: Disable HECI device

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
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Patch Set 4: Code-Review+1

Change in ...coreboot[master]: mb/google/hatch: Disable HECI device

[Paul Fagerburg (Code Review)]

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
......................................................................

Patch Set 4: Code-Review+1

Change in ...coreboot[master]: mb/google/hatch: Disable HECI device

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
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Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/32801/4/src/mainboard/google/hatch/variants/... 
File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:

https://review.coreboot.org/#/c/32801/4/src/mainboard/google/hatch/variants/... 
PS4, Line 49: # Disable Heci1 device
            : 	register "Heci1Disabled" = "1"
Right now, the only setting close to this in cannonlake's chip.h is:

/* HeciEnabled decides the state of Heci1 at end of boot
 * Setting to 0 (default) disables Heci1 and hides the device from OS */
uint8_t HeciEnabled;

Change in ...coreboot[master]: mb/google/hatch: Disable HECI device

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/32801/4/src/mainboard/google/hatch/variants/... 
File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:

https://review.coreboot.org/#/c/32801/4/src/mainboard/google/hatch/variants/... 
PS4, Line 49: # Disable Heci1 device
            : 	register "Heci1Disabled" = "1"
> Right now, the only setting close to this in cannonlake's chip.h is: […]

https://review.coreboot.org/c/coreboot/+/32992/4 adds Heci1Disabled config.
Above CL is failing since the current header in 3rdparty/fsp git does not have the Heci1Disabled member in FSP_M header. The GitHub has the updated header and needs to be synced into 3rdparty/fsp.

Change in coreboot[master]: mb/google/hatch: Disable HECI device

[Aamir Bohra (Code Review)]

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
......................................................................

Patch Set 7:

This change is ready for review.

Change in coreboot[master]: mb/google/hatch: Disable HECI device

[Aamir Bohra (Code Review)]

Aamir Bohra has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/32801 )

Change subject: mb/google/hatch: Disable HECI device
......................................................................

Abandoned

# Enable heci communication
    register "HeciEnabled" = "0"
is already set