Change in coreboot[master]: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63836 )

Change subject: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters
......................................................................

Patch Set 6: Verified-1

(2 comments)

File src/soc/intel/alderlake/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150256):
https://review.coreboot.org/c/coreboot/+/63836/comment/81a70222_5cd5143b 
PS6, Line 889: 				uint64_t :4;
space prohibited before that ':' (ctx:WxV)

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150256):
https://review.coreboot.org/c/coreboot/+/63836/comment/a87f56d6_d10f5739 
PS6, Line 891: 				uint64_t :16;
space prohibited before that ':' (ctx:WxV)