[S] Change in coreboot[main]: soc/intel/pantherlake: Display Sign-of-Life during memory training

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Jeremy Compostella, Julius Werner, Jérémy Compostella, Paul Menzel, Pranava Y N, Subrata Banik, Vikrant L Jadeja.

Karthik Ramasubramanian has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email )

Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
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Patch Set 23: Code-Review+1

(1 comment)

File src/soc/intel/pantherlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/85454/comment/c0e93de0_c917204c?usp... :
PS21, Line 387: 	m_cfg->VgaMessage = (efi_uintn_t)ux_locales_get_text(UX_LOCALE_MSG_MEMORY_TRAINING);
> > We have an open ticket to track the idea of whether to refactor some code or not. […]

Even if we decide to take no action, we can update the TODO with the reason for code duplication. That way in future, everybody in the community know why the code duplication approach is chosen.