Change in ...coreboot[master]: riscv: create Kconfig architecture features for new parts

[Martin Roth (Code Review)]

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30348 )

Change subject: riscv: create Kconfig architecture features for new parts
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Patch Set 2:

(3 comments)

https://review.coreboot.org/#/c/30348/2/3rdparty/blobs 
File 3rdparty/blobs:

https://review.coreboot.org/#/c/30348/2/3rdparty/blobs@1 
PS2, Line 1: Subproject commit dd00ad1260ef1dc0ba8c55c06ab10c7639dc3eb1
Accidental update?

https://review.coreboot.org/#/c/30348/2/src/arch/riscv/Kconfig 
File src/arch/riscv/Kconfig:

https://review.coreboot.org/#/c/30348/2/src/arch/riscv/Kconfig@14 
PS2, Line 14: config ARCH_RISCV_M
            : 	# Whether a SOC implements M mode.
            : 	# M mode is the most privileged mode, it is
            : 	# the equivalent in some ways of x86 SMM mode
            : 	# save that in M mode it is impossible to turn
            : 	# on paging.
            : 	# While the spec requires it, there is at least
            : 	# one implementation that will not have it due
            : 	# to security concerns.
            : 	bool
            : 	default y
Maybe add another config option to allow this to be disabled via a select:

config ARCH_RISCV_M_DISABLED
   bool

config ARCH_RISCV_M
   bool
   default n if ARCH_RISCV_M_DISABLED
   default y

https://review.coreboot.org/#/c/30348/2/src/arch/riscv/Kconfig@40 
PS2, Line 40: config ARCH_RISCV_RV32
            : 	bool
            : 	default n
maybe default this to y unless 64-bit is selected?