Eran Mitrani has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79292?usp=email )
Change subject: mb/google/rex/var/deku: Enable LAN0, LAN1 ......................................................................
mb/google/rex/var/deku: Enable LAN0, LAN1
Add overridetree.cb entry to configure the LAN0 LAN1 devices.
BUG=b:305793886 TEST=WIP, not tested yet.
Signed-off-by: Eran Mitrani mitrani@google.com Change-Id: I8980dabc7f9fc731a2b60c599e1e48c9b11dabb4 --- M src/mainboard/google/rex/variants/deku/overridetree.cb 1 file changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/79292/1
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index 4dca7e2..2cba613 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -55,6 +55,36 @@ }"
device domain 0 on + device ref pcie_rp7 on + # Enable LAN1 Card PCIE 7 using clk 2 + register "pcie_rp[PCH_RP(7)]" = "{ + .clk_src = 2, + .clk_req = 2, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip drivers/net + register "customized_leds" = "0x05af" + register "wake" = "GPE0_DW0_01" # GPP_D01 + register "device_index" = "0" + register "add_acpi_dma_property" = "true" + device pci 00.0 on end + end + end #PCIE7 LAN1 card + device ref pcie_rp10 on + # Enable LAN0 Card PCIE 10 using clk 8 + register "pcie_rp[PCH_RP(10)]" = "{ + .clk_src = 8, + .clk_req = 8, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip drivers/net + register "customized_leds" = "0x05af" + register "wake" = "GPE0_DW1_04" # GPP_E04 + register "device_index" = "1" + register "add_acpi_dma_property" = "true" + device pci 00.0 on end + end + end #PCIE10 LAN0 card device ref pcie_rp11 on # Enable SSD Card PCIE 11 using clk 7 register "pcie_rp[PCH_RP(11)]" = "{
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Eran Mitrani (Code Review)