Change in ...coreboot[master]: soc/intel/denverton_ns: Rework acpi/cpu.asl

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29892

Change subject: soc/intel/denverton_ns: Rework acpi/cpu.asl
......................................................................

soc/intel/denverton_ns: Rework acpi/cpu.asl

Change-Id: If482c64e7133cc6d82472d121ac138fc1b60a183
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/acpi/cpu.asl
2 files changed, 22 insertions(+), 110 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29892/1

diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index a75a182..416d1e4 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -253,6 +253,22 @@

acpigen_pop_len();
    }
+	/* PPKG is usually used for thermal management
+	   of the first and only package. */
+	acpigen_write_processor_package("PPKG", 0, num_cpus);
+
+	/* Add a method to notify processor nodes */
+	acpigen_write_method("\_PR.CNOT", 1);
+	for (core = 0; core < num_cpus; core++) {
+		char buffer[DEVICE_PATH_MAX];
+		snprintf(buffer, sizeof(buffer), "\_PR.CP%c%c",
+			 '0' + core / 10, '0' + core % 10);
+		acpigen_emit_byte(NOTIFY_OP);
+		acpigen_emit_namestring(buffer);
+		acpigen_emit_byte(ARG0_OP);
+	}
+	acpigen_pop_len();
+
 }

unsigned long acpi_madt_irq_overrides(unsigned long current)
diff --git a/src/soc/intel/denverton_ns/acpi/cpu.asl b/src/soc/intel/denverton_ns/acpi/cpu.asl
index 00dc6c7..60ecc5c 100644
--- a/src/soc/intel/denverton_ns/acpi/cpu.asl
+++ b/src/soc/intel/denverton_ns/acpi/cpu.asl
@@ -15,127 +15,23 @@
  *
  */

-/* These devices are created at runtime */
-External (_PR.CP00, DeviceObj)
-External (_PR.CP01, DeviceObj)
-External (_PR.CP02, DeviceObj)
-External (_PR.CP03, DeviceObj)
-External (_PR.CP04, DeviceObj)
-External (_PR.CP05, DeviceObj)
-External (_PR.CP06, DeviceObj)
-External (_PR.CP07, DeviceObj)
-External (_PR.CP08, DeviceObj)
-External (_PR.CP09, DeviceObj)
-External (_PR.CP10, DeviceObj)
-External (_PR.CP11, DeviceObj)
-External (_PR.CP12, DeviceObj)
-External (_PR.CP13, DeviceObj)
-External (_PR.CP14, DeviceObj)
-External (_PR.CP15, DeviceObj)
+/* These come from the dynamically created CPU SSDT */
+External (_PR.CNOT, MethodObj)

/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
 Method (PNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (_PR.CP00, 0x81)  // _CST
-		Notify (_PR.CP01, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (_PR.CP02, 0x81)  // _CST
-		Notify (_PR.CP03, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (_PR.CP04, 0x81)  // _CST
-		Notify (_PR.CP05, 0x81)  // _CST
-		Notify (_PR.CP06, 0x81)  // _CST
-		Notify (_PR.CP07, 0x81)  // _CST
-	}
-	If (LGreaterEqual (\PCNT, 16)) {
-		Notify (_PR.CP08, 0x81)  // _CST
-		Notify (_PR.CP09, 0x81)  // _CST
-		Notify (_PR.CP10, 0x81)  // _CST
-		Notify (_PR.CP11, 0x81)  // _CST
-		Notify (_PR.CP12, 0x81)  // _CST
-		Notify (_PR.CP13, 0x81)  // _CST
-		Notify (_PR.CP14, 0x81)  // _CST
-		Notify (_PR.CP15, 0x81)  // _CST
-	}
+	_PR.CNOT (0x81)
 }

/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
 Method (PPCN)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (_PR.CP00, 0x80)  // _PPC
-		Notify (_PR.CP01, 0x80)  // _PPC
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (_PR.CP02, 0x80)  // _PPC
-		Notify (_PR.CP03, 0x80)  // _PPC
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (_PR.CP04, 0x80)  // _PPC
-		Notify (_PR.CP05, 0x80)  // _PPC
-		Notify (_PR.CP06, 0x80)  // _PPC
-		Notify (_PR.CP07, 0x80)  // _PPC
-	}
-	If (LGreaterEqual (\PCNT, 16)) {
-		Notify (_PR.CP08, 0x80)  // _PPC
-		Notify (_PR.CP09, 0x80)  // _PPC
-		Notify (_PR.CP10, 0x80)  // _PPC
-		Notify (_PR.CP11, 0x80)  // _PPC
-		Notify (_PR.CP12, 0x80)  // _PPC
-		Notify (_PR.CP13, 0x80)  // _PPC
-		Notify (_PR.CP14, 0x80)  // _PPC
-		Notify (_PR.CP15, 0x80)  // _PPC
-	}
+	_PR.CNOT (0x81)
 }

/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
 Method (TNOT)
 {
-	If (LGreaterEqual (\PCNT, 2)) {
-		Notify (_PR.CP00, 0x82)  // _TPC
-		Notify (_PR.CP01, 0x82)  // _TPC
-	}
-	If (LGreaterEqual (\PCNT, 4)) {
-		Notify (_PR.CP02, 0x82)  // _TPC
-		Notify (_PR.CP03, 0x82)  // _TPC
-	}
-	If (LGreaterEqual (\PCNT, 8)) {
-		Notify (_PR.CP04, 0x82)  // _TPC
-		Notify (_PR.CP05, 0x82)  // _TPC
-		Notify (_PR.CP06, 0x82)  // _TPC
-		Notify (_PR.CP07, 0x82)  // _TPC
-	}
-	If (LGreaterEqual (\PCNT, 16)) {
-		Notify (_PR.CP08, 0x82)  // _TPC
-		Notify (_PR.CP09, 0x82)  // _TPC
-		Notify (_PR.CP10, 0x82)  // _TPC
-		Notify (_PR.CP11, 0x82)  // _TPC
-		Notify (_PR.CP12, 0x82)  // _TPC
-		Notify (_PR.CP13, 0x82)  // _TPC
-		Notify (_PR.CP14, 0x82)  // _TPC
-		Notify (_PR.CP15, 0x82)  // _TPC
-	}
-}
-
-/* Return a package containing enabled processor entries */
-Method (PPKG)
-{
-	If (LGreaterEqual (\PCNT, 16)) {
-		Return (Package() {_PR.CP00, _PR.CP01, _PR.CP02, _PR.CP03,
-				   _PR.CP04, _PR.CP05, _PR.CP06, _PR.CP07,
-				   _PR.CP08, _PR.CP09, _PR.CP10, _PR.CP11,
-				   _PR.CP12, _PR.CP13, _PR.CP14, _PR.CP15})
-	} ElseIf (LGreaterEqual (\PCNT, 8)) {
-		Return (Package() {_PR.CP00, _PR.CP01, _PR.CP02, _PR.CP03,
-				   _PR.CP04, _PR.CP05, _PR.CP06, _PR.CP07})
-	} ElseIf (LGreaterEqual (\PCNT, 4)) {
-		Return (Package() {_PR.CP00, _PR.CP01, _PR.CP02, _PR.CP03})
-	} ElseIf (LGreaterEqual (\PCNT, 2)) {
-		Return (Package() {_PR.CP00, _PR.CP01})
-	} Else {
-		Return (Package() {_PR.CP00})
-	}
-}
+	_PR.CNOT (0x82)
+}
\ No newline at end of file