[L] Change in coreboot[main]: soc/intel/ptl: Define GPE1 macros and register fields

[Cliff Huang (Code Review)]

Attention is currently required from: Kapil Porwal, Paul Menzel, Pranava Y N.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84297?usp=email )

Change subject: soc/intel/ptl: Define GPE1 macros and register fields
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Patch Set 10:

(1 comment)

File src/soc/intel/pantherlake/include/soc/pm.h:

PS9:
> Split the reformatting out into a separate commit?

The actual event bits for GPE1 are PMC I/O registers, which are defines in pm.h. Hence, I keep this header in the same CL. However, I modified the title.