Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51374 )
Change subject: soc/intel/common/block/cpu: Remove redundant instruction ......................................................................
soc/intel/common/block/cpu: Remove redundant instruction
TEST=Able to build and boot TGL platform with eNEM enable.
Change-Id: Ifd0b7e1a90cad4a4837adf6067fe8301dcd0a941 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/common/block/cpu/car/cache_as_ram.S 1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/51374/1
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index 4df7eac..614cd9a1b 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -424,7 +424,6 @@ */ mov $0x01, %eax shl %cl, %eax - shl %cl, %eax subl $0x01, %eax /* contains SF mask */ /* * Program MSR 0x1891 IA32_CR_SF_QOS_MASK_1 with