Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: xeon_sp: Update skx uncore irq routing acpi tables ......................................................................
xeon_sp: Update skx uncore irq routing acpi tables
Update the skx uncore acpi routing tables to match cpx. This adds the irq routing for B-D for legacy and IOAPIC modes.
Change-Id: Iac0ffdb467a78b9befe7402c074835ea602d43c8 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl 1 file changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/45271/1
diff --git a/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl b/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl index 9926367..3395e7d 100644 --- a/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl +++ b/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl @@ -8,9 +8,9 @@
#define GEN_PCIE_LEGACY_IRQ() \ Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0001FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0002FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0003FFFF, 0x00, LNKA, 0x00 } + Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ + Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ + Package () { 0x0003FFFF, 0x03, LNKD, 0x00 }
#define GEN_UNCORE_LEGACY_IRQ(dev) \ Package () { ##dev, 0x00, LNKA, 0x00 }, \ @@ -18,11 +18,11 @@ Package () { ##dev, 0x02, LNKC, 0x00 }, \ Package () { ##dev, 0x03, LNKD, 0x00 }
-#define GEN_PCIE_IOAPIC_IRQ(irq) \ - Package () { 0x0000FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0001FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0002FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0003FFFF, 0x00, 0x00, ##irq } +#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ + Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ + Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ + Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ + Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 }
#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Package () { ##dev, 0x00, 0x00, ##irq1 }, \ @@ -265,8 +265,8 @@ // Socket 0, IIOStack 1 device IOAPIC interrupt routing Name (AR10, Package (0x40) { - // PCI Express Port 1A-1D - GEN_PCIE_IOAPIC_IRQ(0x27), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x27,0x21,0x22,0x23),
// Uncore CHAUTIL Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x20, 0x24, 0x25, 0x26), @@ -299,7 +299,7 @@ // Socket 0, IIOStack 2 device legacy interrupt routing Name (PR20, Package (0x24) { - // PCI Express Port 2 on PC02 + // PCI Express Port A-D on PC02 GEN_PCIE_LEGACY_IRQ(),
// Uncore M2MEM Devices @@ -328,8 +328,8 @@ // Socket 0, IIOStack 2 device IOAPIC interrupt routing Name (AR20, Package (0x24) { - // PCI Express Port 2 on PC02 - GEN_PCIE_IOAPIC_IRQ(0x2F), + // PCI Express Port A-D on PC02 + GEN_PCIE_IOAPIC_IRQ(0x2F,0x29,0x2A,0x2B),
// Uncore M2MEM Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x28, 0x2C, 0x2D, 0x2E), @@ -381,8 +381,8 @@ // Socket 0, IIOStack 3 device IOAPIC interrupt routing Name (AR28, Package (0x20) { - // PCI Express Port 3 on PC03 - GEN_PCIE_IOAPIC_IRQ(0x37), + // PCI Express Port 3 A-D on PC03 + GEN_PCIE_IOAPIC_IRQ(0x37,0x31,0x32,0x33),
// KTI Devices GEN_UNCORE_IOAPIC_IRQ(0x000EFFFF, 0x30, 0x34, 0x35, 0x36), @@ -457,8 +457,8 @@ // Socket 1, IIOStack 1 device IOAPIC interrupt routing Name (AR50, Package (0x40) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x57), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x57,0x51,0x52,0x53),
// CHA Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x50, 0x54, 0x55, 0x56), @@ -502,8 +502,8 @@ // Socket 1, IIOStack 2 device IOAPIC interrupt routing Name (AR60, Package (0x24) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x5F), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x5F,0x59,0x5A,0x5B),
// Integrated Memory Controller GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x58, 0x5C, 0x5D, 0x5E), @@ -537,8 +537,8 @@ // Socket 1, IIOStack 3 device legacy interrupt routing Name (AR68, Package (0x20) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x67), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x67,0x61,0x62,0x63),
// Uncore Devices GEN_UNCORE_IOAPIC_IRQ(0x000EFFFF, 0x60, 0x64, 0x65, 0x66),
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: xeon_sp: Update skx uncore irq routing acpi tables ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45271/1/src/soc/intel/xeon_sp/skx/a... File src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl:
https://review.coreboot.org/c/coreboot/+/45271/1/src/soc/intel/xeon_sp/skx/a... PS1, Line 384: 3 I think you intended to remove this 3 based on the changes to the other comments.
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: xeon_sp: Update skx uncore irq routing acpi tables ......................................................................
Patch Set 1: Code-Review+1
Need to test on TP.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: xeon_sp: Update skx uncore irq routing acpi tables ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: xeon_sp: Update skx uncore irq routing acpi tables ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG@7 PS1, Line 7: xeon_sp: Update skx uncore irq routing acpi tables soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG@10 PS1, Line 10: irq IRQ
Hello build bot (Jenkins), Anjaneya "Reddy" Chagam, Jonathan Zhang, Jay Talbott, Johnny Lin, Angel Pons, Morgan Jang, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45271
to look at the new patch set (#2).
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
Update the skx uncore ACPI routing tables to match cpx. This adds the IRQ routing for B-D for legacy and IOAPIC modes.
Change-Id: Iac0ffdb467a78b9befe7402c074835ea602d43c8 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl 1 file changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/45271/2
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG@7 PS1, Line 7: xeon_sp: Update skx uncore irq routing acpi tables
soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
Ack
https://review.coreboot.org/c/coreboot/+/45271/1//COMMIT_MSG@10 PS1, Line 10: irq
IRQ
Ack
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45271/2/src/soc/intel/xeon_sp/skx/a... File src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl:
https://review.coreboot.org/c/coreboot/+/45271/2/src/soc/intel/xeon_sp/skx/a... PS2, Line 384: 3 Remove '3'?
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45271/2/src/soc/intel/xeon_sp/skx/a... File src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl:
https://review.coreboot.org/c/coreboot/+/45271/2/src/soc/intel/xeon_sp/skx/a... PS2, Line 384: 3
Remove '3'?
Done
Hello build bot (Jenkins), Anjaneya "Reddy" Chagam, Jonathan Zhang, Jay Talbott, Johnny Lin, Angel Pons, Morgan Jang, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45271
to look at the new patch set (#3).
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
Update the skx uncore ACPI routing tables to match cpx. This adds the IRQ routing for B-D for legacy and IOAPIC modes.
Change-Id: Iac0ffdb467a78b9befe7402c074835ea602d43c8 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M 3rdparty/amd_blobs M src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl 2 files changed, 22 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/45271/3
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 3:
(1 comment)
How did 3rdparty/amd_blobs end up in patchset 3?
https://review.coreboot.org/c/coreboot/+/45271/3/3rdparty/amd_blobs File 3rdparty/amd_blobs:
https://review.coreboot.org/c/coreboot/+/45271/3/3rdparty/amd_blobs@1 PS3, Line 1: 3bd9078d27b10ea732a31bfabe48fa9868379850 How did this file end up in patchset 3? This change seems completely irrelevant to this patch.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 3: Code-Review-2
(1 comment)
Rebase issue with submodules.
https://review.coreboot.org/c/coreboot/+/45271/3/3rdparty/amd_blobs File 3rdparty/amd_blobs:
https://review.coreboot.org/c/coreboot/+/45271/3/3rdparty/amd_blobs@1 PS3, Line 1: 3bd9078d27b10ea732a31bfabe48fa9868379850
How did this file end up in patchset 3? […]
This is a rebase artifact. submodules changed, but they don't get updated with a fetch from master. It is anoying.
Hello build bot (Jenkins), Anjaneya "Reddy" Chagam, Jonathan Zhang, Jay Talbott, Johnny Lin, Angel Pons, Morgan Jang, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45271
to look at the new patch set (#4).
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
Update the skx uncore ACPI routing tables to match cpx. This adds the IRQ routing for B-D for legacy and IOAPIC modes.
Change-Id: Iac0ffdb467a78b9befe7402c074835ea602d43c8 Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl 1 file changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/45271/4
Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 4: Code-Review+1
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 4: -Code-Review
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45271/1/src/soc/intel/xeon_sp/skx/a... File src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl:
https://review.coreboot.org/c/coreboot/+/45271/1/src/soc/intel/xeon_sp/skx/a... PS1, Line 384: 3
I think you intended to remove this 3 based on the changes to the other comments.
Done
Marc Jones has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45271 )
Change subject: soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables ......................................................................
soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables
Update the skx uncore ACPI routing tables to match cpx. This adds the IRQ routing for B-D for legacy and IOAPIC modes.
Change-Id: Iac0ffdb467a78b9befe7402c074835ea602d43c8 Signed-off-by: Marc Jones marcjones@sysproconsulting.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45271 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Jay Talbott JayTalbott@sysproconsulting.com Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl 1 file changed, 21 insertions(+), 21 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Jay Talbott: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl b/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl index 9926367..03872e3 100644 --- a/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl +++ b/src/soc/intel/xeon_sp/skx/acpi/uncore_irq.asl @@ -8,9 +8,9 @@
#define GEN_PCIE_LEGACY_IRQ() \ Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0001FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0002FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0003FFFF, 0x00, LNKA, 0x00 } + Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ + Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ + Package () { 0x0003FFFF, 0x03, LNKD, 0x00 }
#define GEN_UNCORE_LEGACY_IRQ(dev) \ Package () { ##dev, 0x00, LNKA, 0x00 }, \ @@ -18,11 +18,11 @@ Package () { ##dev, 0x02, LNKC, 0x00 }, \ Package () { ##dev, 0x03, LNKD, 0x00 }
-#define GEN_PCIE_IOAPIC_IRQ(irq) \ - Package () { 0x0000FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0001FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0002FFFF, 0x00, 0x00, ##irq }, \ - Package () { 0x0003FFFF, 0x00, 0x00, ##irq } +#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ + Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ + Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ + Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ + Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 }
#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Package () { ##dev, 0x00, 0x00, ##irq1 }, \ @@ -265,8 +265,8 @@ // Socket 0, IIOStack 1 device IOAPIC interrupt routing Name (AR10, Package (0x40) { - // PCI Express Port 1A-1D - GEN_PCIE_IOAPIC_IRQ(0x27), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x27,0x21,0x22,0x23),
// Uncore CHAUTIL Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x20, 0x24, 0x25, 0x26), @@ -299,7 +299,7 @@ // Socket 0, IIOStack 2 device legacy interrupt routing Name (PR20, Package (0x24) { - // PCI Express Port 2 on PC02 + // PCI Express Port A-D on PC02 GEN_PCIE_LEGACY_IRQ(),
// Uncore M2MEM Devices @@ -328,8 +328,8 @@ // Socket 0, IIOStack 2 device IOAPIC interrupt routing Name (AR20, Package (0x24) { - // PCI Express Port 2 on PC02 - GEN_PCIE_IOAPIC_IRQ(0x2F), + // PCI Express Port A-D on PC02 + GEN_PCIE_IOAPIC_IRQ(0x2F,0x29,0x2A,0x2B),
// Uncore M2MEM Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x28, 0x2C, 0x2D, 0x2E), @@ -381,8 +381,8 @@ // Socket 0, IIOStack 3 device IOAPIC interrupt routing Name (AR28, Package (0x20) { - // PCI Express Port 3 on PC03 - GEN_PCIE_IOAPIC_IRQ(0x37), + // PCI Express Port A-D on PC03 + GEN_PCIE_IOAPIC_IRQ(0x37,0x31,0x32,0x33),
// KTI Devices GEN_UNCORE_IOAPIC_IRQ(0x000EFFFF, 0x30, 0x34, 0x35, 0x36), @@ -457,8 +457,8 @@ // Socket 1, IIOStack 1 device IOAPIC interrupt routing Name (AR50, Package (0x40) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x57), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x57,0x51,0x52,0x53),
// CHA Devices GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x50, 0x54, 0x55, 0x56), @@ -502,8 +502,8 @@ // Socket 1, IIOStack 2 device IOAPIC interrupt routing Name (AR60, Package (0x24) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x5F), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x5F,0x59,0x5A,0x5B),
// Integrated Memory Controller GEN_UNCORE_IOAPIC_IRQ(0x0008FFFF, 0x58, 0x5C, 0x5D, 0x5E), @@ -537,8 +537,8 @@ // Socket 1, IIOStack 3 device legacy interrupt routing Name (AR68, Package (0x20) { - // PCI Express Port - GEN_PCIE_IOAPIC_IRQ(0x67), + // PCI Express Port A-D + GEN_PCIE_IOAPIC_IRQ(0x67,0x61,0x62,0x63),
// Uncore Devices GEN_UNCORE_IOAPIC_IRQ(0x000EFFFF, 0x60, 0x64, 0x65, 0x66),
-
Angel Pons (Code Review) -
Jay Talbott (Code Review)
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Jonathan Zhang (Code Review)
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Marc Jones (Code Review)