Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34172 )
Change subject: soc/intel: Drop some HAVE_SMI_HANDLER guards ......................................................................
soc/intel: Drop some HAVE_SMI_HANDLER guards
The necessary conditionals are evaluated within cpu/x86/Makefile.inc and there are no default targets added unconditionally to build.
Change-Id: I694cccf6779551445b83659838749dff02aedece Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34172 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/fsp_baytrail/Makefile.inc 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index cfd8149..f01fadb 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -19,7 +19,7 @@ subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr -subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm +subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/cache
diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index 2fbf34e..3a58be9 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -20,7 +20,7 @@ subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr -subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm +subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/cache subdirs-y += ../../../cpu/intel/microcode