[S] Change in coreboot[main]: soc/mediatek/**/spi.h: Enclose complex macros in parentheses

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85001?usp=email )

Change subject: soc/mediatek/**/spi.h: Enclose complex macros in parentheses
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soc/mediatek/**/spi.h: Enclose complex macros in parentheses

Fix the checkpatch error:

Macros with complex values should be enclosed in parentheses

Change-Id: Ia0e4582c1dd19ed3f757a2cb3c3fc33138302d74
Signed-off-by: Yu-Ping Wu 
---
M src/soc/mediatek/mt8173/include/soc/spi.h
M src/soc/mediatek/mt8183/include/soc/spi.h
M src/soc/mediatek/mt8186/include/soc/spi.h
M src/soc/mediatek/mt8188/include/soc/spi.h
M src/soc/mediatek/mt8192/include/soc/spi.h
M src/soc/mediatek/mt8195/include/soc/spi.h
6 files changed, 12 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/85001/1

diff --git a/src/soc/mediatek/mt8173/include/soc/spi.h b/src/soc/mediatek/mt8173/include/soc/spi.h
index 4a81eae..3cb1a01 100644
--- a/src/soc/mediatek/mt8173/include/soc/spi.h
+++ b/src/soc/mediatek/mt8173/include/soc/spi.h
@@ -7,8 +7,8 @@

#define SPI_BUS_NUMBER 1

-#define GET_SCK_REG(x) x->spi_cfg0_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg0_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)

DEFINE_BITFIELD(SPI_CFG_SCK_HIGH, 7, 0)
 DEFINE_BITFIELD(SPI_CFG_SCK_LOW, 15, 8)
diff --git a/src/soc/mediatek/mt8183/include/soc/spi.h b/src/soc/mediatek/mt8183/include/soc/spi.h
index 47dee02..48e0d55 100644
--- a/src/soc/mediatek/mt8183/include/soc/spi.h
+++ b/src/soc/mediatek/mt8183/include/soc/spi.h
@@ -7,8 +7,8 @@

#define SPI_BUS_NUMBER 6

-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)

DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8186/include/soc/spi.h b/src/soc/mediatek/mt8186/include/soc/spi.h
index 2588dcc..e70f3cd 100644
--- a/src/soc/mediatek/mt8186/include/soc/spi.h
+++ b/src/soc/mediatek/mt8186/include/soc/spi.h
@@ -12,8 +12,8 @@

#define SPI_BUS_NUMBER 6

-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)

DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8188/include/soc/spi.h b/src/soc/mediatek/mt8188/include/soc/spi.h
index b1ac9ff..a44ba43 100644
--- a/src/soc/mediatek/mt8188/include/soc/spi.h
+++ b/src/soc/mediatek/mt8188/include/soc/spi.h
@@ -13,8 +13,8 @@

#define SPI_BUS_NUMBER 6

-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cmd_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cmd_reg)

DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8192/include/soc/spi.h b/src/soc/mediatek/mt8192/include/soc/spi.h
index 28fe839..e2f6955 100644
--- a/src/soc/mediatek/mt8192/include/soc/spi.h
+++ b/src/soc/mediatek/mt8192/include/soc/spi.h
@@ -7,8 +7,8 @@

#define SPI_BUS_NUMBER 8

-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)

DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8195/include/soc/spi.h b/src/soc/mediatek/mt8195/include/soc/spi.h
index cd87277..9bd69f9 100644
--- a/src/soc/mediatek/mt8195/include/soc/spi.h
+++ b/src/soc/mediatek/mt8195/include/soc/spi.h
@@ -7,8 +7,8 @@

#define SPI_BUS_NUMBER 6

-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)

DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)