Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik.
Pranava Y N has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/82637?usp=email )
Change subject: mb/google/brya/variants/trulo: Support OCP fault on A0/1 ports ......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82637/comment/5faef57a_f23eafac?usp... : PS1, Line 14:
No Signed-off-by line in commit message
Acknowledged
Commit Message:
https://review.coreboot.org/c/coreboot/+/82637/comment/98cac519_abe0477a?usp... : PS2, Line 7: mb/google/brya/variants/trulo
nit:mb/google/trulo: […]
The changes are updated from baseboard to variant.
https://review.coreboot.org/c/coreboot/+/82637/comment/637763b1_d4303542?usp... : PS2, Line 11:
Please document the source.
Acknowledged
File src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/82637/comment/9eea94bd_1111785d?usp... : PS1, Line 3: register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0 : register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1 :
this should be added in the variant devicetree IMO as each variant could have different HW design
Acknowledged