Change in ...coreboot[master]: mb/google/sarien: Set minimum assertion width values

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30722

Change subject: mb/google/sarien: Set minimum assertion width values
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mb/google/sarien: Set minimum assertion width values

Explicitly configure the minimum assertion width values to ensure
that they are set as expected and are not using unknown defaults.

Change-Id: I9a88e5b6002137df6e572b84d0de8a69522938f9
Signed-off-by: Duncan Laurie 
---
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
2 files changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/30722/1

diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 5fdf8fd..cccddce 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -23,6 +23,10 @@
    register "InternalGfx" = "1"
    register "SkipExtGfxScan" = "1"
    register "VmxEnable" = "1"
+	register "PchPmSlpS3MinAssert" = "3"  # 50ms
+	register "PchPmSlpS4MinAssert" = "4"  # 4s
+	register "PchPmSlpSusMinAssert" = "4" # 4s
+	register "PchPmSlpAMinAssert" = "4"   # 2s

register "speed_shift_enable" = "1"
    register "s0ix_enable" = "1"
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 358d131..b590bac 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -27,6 +27,10 @@
    register "InternalGfx" = "1"
    register "SkipExtGfxScan" = "1"
    register "VmxEnable" = "1"
+	register "PchPmSlpS3MinAssert" = "3"  # 50ms
+	register "PchPmSlpS4MinAssert" = "4"  # 4s
+	register "PchPmSlpSusMinAssert" = "4" # 4s
+	register "PchPmSlpAMinAssert" = "4"   # 2s

register "speed_shift_enable" = "1"
    register "s0ix_enable" = "1"