Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
......................................................................
Patch Set 47:
I assume you used the downstream FSP binary for this test? Please also
mention your post-code findings here for reference.
yes, using the Google BSW FSP binary.
last post codes seen were 20 90 42 43
The sequence 20-90-42-43 is related to incorrect/missing CPU microcode.
(Noticed this sequence on Intel CherryHill CRB when using wrong (CPUID) ucode.)
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