Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
mb/intel/jslrvp: Update PMC as hidden device
This change allows treating the PMC as a 'hidden' PCI device on JasperLake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI.
Original patch for jasperlake SoC here: https://review.coreboot.org/c/coreboot/+/42018
This change was missing for JasperLake rvp board.
BUG=None BRANCH=None TEST=Checked PMC init function is called and also checked PCI resource for PMC device 1f.2.
Change-Id: I7531d32c62d3f9735938f744f2892ab9c9bebddf Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/45793/1
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index f8fea47..fc96719 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -466,7 +466,7 @@ end # GSPI #1 device pci 1f.0 on end # eSPI Interface device pci 1f.1 on end # P2SB - device pci 1f.2 on end # Power Management Controller + device pci 1f.2 hidden end # Power Management Controller device pci 1f.3 on end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI
Hello build bot (Jenkins), Tim Wawrzynczak, Subrata Banik, Ronak Kanabar, Aamir Bohra,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45793
to look at the new patch set (#2).
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
mb/intel/jslrvp: Update PMC as hidden device
This change allows treating the PMC as a 'hidden' PCI device on JasperLake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI.
Original patch for jasperlake SoC here: https://review.coreboot.org/c/coreboot/+/42018
This change was missing for JasperLake rvp board.
BUG=None BRANCH=None TEST=Checked PMC init function is called and also checked PCI resource for PMC device 1f.2.
Change-Id: I7531d32c62d3f9735938f744f2892ab9c9bebddf Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/45793/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
Patch Set 2: Code-Review+2
(2 comments)
Rebase your code on latest ToT, just now submitted a fix to this issue
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG@14 PS2, Line 14: https://review.coreboot.org/c/coreboot/+/42018 CB:42018
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG@18 PS2, Line 18: BUG=None : BRANCH=None no need
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
Patch Set 2: Code-Review+1
Hello build bot (Jenkins), Tim Wawrzynczak, Subrata Banik, Ronak Kanabar, Aamir Bohra,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45793
to look at the new patch set (#4).
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
mb/intel/jslrvp: Update PMC as hidden device
This change allows treating the PMC as a 'hidden' PCI device on JasperLake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI.
Original patch for jasperlake SoC here: CB:42018
This change was missing for JasperLake rvp board.
TEST=Checked PMC init function is called and also checked PCI resource for PMC device 1f.2.
Change-Id: I7531d32c62d3f9735938f744f2892ab9c9bebddf Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/45793/4
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG@14 PS2, Line 14: https://review.coreboot.org/c/coreboot/+/42018
CB:42018
Done
https://review.coreboot.org/c/coreboot/+/45793/2//COMMIT_MSG@18 PS2, Line 18: BUG=None : BRANCH=None
no need
Done
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
Patch Set 4: Code-Review+2
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
Patch Set 4: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45793 )
Change subject: mb/intel/jslrvp: Update PMC as hidden device ......................................................................
mb/intel/jslrvp: Update PMC as hidden device
This change allows treating the PMC as a 'hidden' PCI device on JasperLake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI.
Original patch for jasperlake SoC here: CB:42018
This change was missing for JasperLake rvp board.
TEST=Checked PMC init function is called and also checked PCI resource for PMC device 1f.2.
Change-Id: I7531d32c62d3f9735938f744f2892ab9c9bebddf Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45793 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Ronak Kanabar ronak.kanabar@intel.com Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Ronak Kanabar: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index f8fea47..fc96719 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -466,7 +466,7 @@ end # GSPI #1 device pci 1f.0 on end # eSPI Interface device pci 1f.1 on end # P2SB - device pci 1f.2 on end # Power Management Controller + device pci 1f.2 hidden end # Power Management Controller device pci 1f.3 on end # Intel HDA device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI
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Maulik V Vaghela (Code Review) -
Ronak Kanabar (Code Review)
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Subrata Banik (Code Review)
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Tim Wawrzynczak (Code Review)