Change in coreboot[master]: soc/mediatek: Flush cache before triggering EC reset

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Paul Menzel.
Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59683 )

Change subject: soc/mediatek: Flush cache before triggering EC reset
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Patch Set 5:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/59683/comment/e752d761_942ad509 
PS4, Line 9: log
> console log?

not uart console, it's log stored in cbmem.

https://review.coreboot.org/c/coreboot/+/59683/comment/fbd62025_f50afd09 
PS4, Line 9: on
> in?

Done

https://review.coreboot.org/c/coreboot/+/59683/comment/f69eb797_e64988c1 
PS4, Line 9: There will be no log on cbmem if we trigger ec reset on bootblock
           : stage.
> Why is there no log?

[1] will trigger wdt to send signal to ec and ec will do reset on bootblock stage.
for this reset flow, we observed there is no log remained in cbmem.
After checking this issue, the root cause is cache is not flush before ec resets.
So we add this patch to fix this issue.

[1]:write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);