yongqiang niu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46584 )
Change subject: WIP: soc/mediatek/mt8192: add display debug log ......................................................................
WIP: soc/mediatek/mt8192: add display debug log
Signed-off-by: Yongqiang Niu yongqiang.niu@mediatek.com Change-Id: Ie2fb7c51d32392ec33cf389df3f60130ced3887e --- M src/soc/mediatek/mt8192/ddp.c 1 file changed, 69 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/46584/1
diff --git a/src/soc/mediatek/mt8192/ddp.c b/src/soc/mediatek/mt8192/ddp.c index 0d5eab5..8136d2b 100644 --- a/src/soc/mediatek/mt8192/ddp.c +++ b/src/soc/mediatek/mt8192/ddp.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <device/mmio.h> #include <edid.h> #include <soc/addressmap.h> @@ -166,6 +167,70 @@ clrbits32(&mmsys_cfg->mmsys_cg_con2, CG_CON2_DISP_ALL); }
+//#define cnt_va_to_pa(va) (((void*)(va) - )) +struct module_info { + const char *name; + void *va; + //u32 pa; + u32 offset; + u32 lenght; +}; + +struct module_info dump_info[] = { + {"mmsys", (void *)MMSYS_BASE, 0x100, 0x100}, + +#if 1 + {"mmsys", (void *)MMSYS_BASE, 0xf00, 0x100}, + {"mutex", (void *)DISP_MUTEX_BASE, 0x000, 0x100}, + {"ovl0", (void *)DISP_OVL0_BASE, 0x000, 0x100}, + {"ovl0", (void *)DISP_OVL0_BASE, 0xf00, 0x100}, + {"ovl0_2l", (void *)DISP_OVL1_BASE, 0x000, 0x100}, + {"ovl0_2l", (void *)DISP_OVL1_BASE, 0xf00, 0x100}, + {"rdma0", (void *)DISP_RDMA0_BASE, 0x000, 0x100}, + {"color0", (void *)DISP_COLOR0_BASE, 0x400, 0x100}, + {"color0", (void *)DISP_COLOR0_BASE, 0xc00, 0x100}, + {"ccorr0", (void *)DISP_CCORR0_BASE, 0x000, 0x100}, + {"aal0", (void *)DISP_AAL0_BASE, 0x000, 0x100}, + {"aal0", (void *)DISP_AAL0_BASE, 0x400, 0x100}, + {"gamma0", (void *)DISP_GAMMA0_BASE, 0x000, 0x100}, + {"postmask0", (void *)DISP_POSTMASK0_BASE, 0x000, 0x100}, + {"dither0", (void *)DISP_DITHER0_BASE, 0x000, 0x100}, + {"dsi0", (void *)DSI0_BASE, 0x000, 0x100}, +#endif +}; + +static void dump_module(struct module_info *comp) +{ + u32 i; + void *local_offset; + + printk(BIOS_INFO, "start dump module %s\n", comp->name); + + local_offset = (comp->va + comp->offset); + + for (i = 0; i < comp->lenght/4; i+=4, local_offset+=16) { + printk(BIOS_INFO, "0x%08llX | %08X %08X %08X %08X\n", + (u64)local_offset, + read32((local_offset + 0x0)), + read32((local_offset + 0x4)), + read32((local_offset + 0x8)), + read32((local_offset + 0xc))); + } +} + +static void dump_disp_info(void) +{ + u32 i; + struct module_info *comp; + + printk(BIOS_INFO, "%s\n", __func__); + + for (i = 0; i < sizeof(dump_info)/ sizeof(struct module_info); i++) { + comp = &dump_info[i]; + dump_module(comp); + } +} + void mtk_ddp_init(void) { disp_clock_on(); @@ -196,4 +261,8 @@ rdma_start(); ovl_layer_config(fmt, bpp, width, height); ovl_bgclr_in_sel(1); + + dump_disp_info(); + + //while(1); }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46584 )
Change subject: WIP: soc/mediatek/mt8192: add display debug log ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... File src/soc/mediatek/mt8192/ddp.c:
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... PS1, Line 176: u32 lenght; 'lenght' may be misspelled - perhaps 'length'?
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... PS1, Line 211: for (i = 0; i < comp->lenght/4; i+=4, local_offset+=16) { 'lenght' may be misspelled - perhaps 'length'?
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... PS1, Line 211: for (i = 0; i < comp->lenght/4; i+=4, local_offset+=16) { spaces required around that '+=' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... PS1, Line 211: for (i = 0; i < comp->lenght/4; i+=4, local_offset+=16) { spaces required around that '+=' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/46584/1/src/soc/mediatek/mt8192/ddp... PS1, Line 228: for (i = 0; i < sizeof(dump_info)/ sizeof(struct module_info); i++) { need consistent spacing around '/' (ctx:VxW)
yongqiang niu has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46584 )
Change subject: WIP: soc/mediatek/mt8192: add display debug log ......................................................................
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