Attention is currently required from: Eric Lai, Ivy Jian, Nick Vaccaro.
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79101?usp=email )
Change subject: mb/google/brox: Set TPM i2c config in device tree ......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79101/comment/94c42015_6ce703ea : PS1, Line 7: Set ic2 configs in device tree
nit: mb/google/brox:
Done
File src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/79101/comment/15910bfe_83439380 : PS1, Line 88: .i2c[0] = { : .speed = I2C_SPEED_FAST, : .rise_time_ns = 650, : .fall_time_ns = 400, : .data_hold_time_ns = 50, : }, : .i2c[1] = { : .speed = I2C_SPEED_FAST, : .rise_time_ns = 650, : .fall_time_ns = 400, : .data_hold_time_ns = 50, : }, : .i2c[2] = { : .speed = I2C_SPEED_FAST, : .rise_time_ns = 900, : .fall_time_ns = 400, : .data_hold_time_ns = 50, : }, : .i2c[3] = { : .early_init = 1, : .speed = I2C_SPEED_FAST, : .rise_time_ns = 600, : .fall_time_ns = 400, : .data_hold_time_ns = 50, : }, : .i2c[5] = { : .speed = I2C_SPEED_FAST, : .rise_time_ns = 650, : .fall_time_ns = 400, : .data_hold_time_ns = 50, : }, :
These need to change appropriately.
Hey Nick, in the past we could set these with through tuning with the help of a hw engineer. Can you help advise me on how we can do this before we get the actual hardware?
https://review.coreboot.org/c/coreboot/+/79101/comment/534fec9a_0d834bc5 : PS1, Line 169: device ref i2c1 on
i2c4
Done
https://review.coreboot.org/c/coreboot/+/79101/comment/2dacdfda_6aecd198 : PS1, Line 172: register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D1_IRQ)"
should it be GPP_E2_IRQ? I see GPP_E2 for GSC_PCH_INT_ODL in gpio. […]
Done