Change in coreboot[master]: soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48311 )
Change subject: soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines ......................................................................
soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines
TEST=Identical timeless build for amd/gardenia.
Change-Id: I04952cdbbe7893f35a674a156a9bc22202fbdc2f Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/stoneyridge/acpi/sb_fch.asl 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/48311/1
diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index 28e29c6..bbb5235 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -30,7 +30,7 @@ { Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) { 7 } - Memory32Fixed (ReadWrite, 0xFED81500, 0x300) + Memory32Fixed (ReadWrite, ACPIMMIO_GPIO0_BASE, 0x300) })
Method (_STA, 0x0, NotSerialized) @@ -46,7 +46,7 @@ Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 10 } - Memory32Fixed (ReadWrite, 0xFEDC6000, 0x2000) + Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000) }) Method (_STA, 0x0, NotSerialized) { @@ -60,7 +60,7 @@ Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 11 } - Memory32Fixed (ReadWrite, 0xFEDC8000, 0x2000) + Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000) }) Method (_STA, 0x0, NotSerialized) {
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48311 )
Change subject: soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48311 )
Change subject: soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines ......................................................................
soc/amd/stoneyridge/acpi/sb_fch: use existing base address defines
TEST=Identical timeless build for amd/gardenia.
Change-Id: I04952cdbbe7893f35a674a156a9bc22202fbdc2f Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/48311 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/stoneyridge/acpi/sb_fch.asl 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index 28e29c6..bbb5235 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -30,7 +30,7 @@ { Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) { 7 } - Memory32Fixed (ReadWrite, 0xFED81500, 0x300) + Memory32Fixed (ReadWrite, ACPIMMIO_GPIO0_BASE, 0x300) })
Method (_STA, 0x0, NotSerialized) @@ -46,7 +46,7 @@ Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 10 } - Memory32Fixed (ReadWrite, 0xFEDC6000, 0x2000) + Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000) }) Method (_STA, 0x0, NotSerialized) { @@ -60,7 +60,7 @@ Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 11 } - Memory32Fixed (ReadWrite, 0xFEDC8000, 0x2000) + Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000) }) Method (_STA, 0x0, NotSerialized) {
-
Felix Held (Code Review) -
Furquan Shaikh (Code Review)