[M] Change in coreboot[main]: soc/amd/glinda/pcie_gpp.c: Add PCI routing table

[Maximilian Brune (Code Review)]

Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/85019?usp=email )

Change subject: soc/amd/glinda/pcie_gpp.c: Add PCI routing table
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Patch Set 1:

(3 comments)

Patchset:

PS1: 
Makefile logic is still missing until I clear up on a few things.

Commit Message:

https://review.coreboot.org/c/coreboot/+/85019/comment/a372e77d_150f7f78?usp... :
PS1, Line 9: This patch adds the PCI interrupt routing table.
I think (not sure) we are only interested in putting the PCI routing info into coreboot if we want to use something like OpenSIL. In the FSP case the information should be provided to us by FSP.

https://review.coreboot.org/c/coreboot/+/85019/comment/3f878a03_db491672?usp... :
PS1, Line 16: boot Linux with pci=nomsi kernel parameter and check /proc/interrupts
Interestingly enough when I do the same test, but instead get the pci routing information from FSP (-> src/soc/amd/common/fsp/pci/pci_routing_info.c) my mainboard doesn't successfully boot into Linux anymore.