Attention is currently required from: Angel Pons, Jérémy Compostella, Patrick Rudolph, Paul Menzel.
Naresh Solanki has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email )
Change subject: soc/amd/glinda/cpu: Update cache info ......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85640/comment/b43d9073_b8360246?usp... : PS3, Line 8:
Please add that to the commit message.
Sure. Will do that in next patchset
File src/soc/amd/glinda/cpu.c:
https://review.coreboot.org/c/coreboot/+/85640/comment/2adeed4a_4f152b2d?usp... : PS3, Line 43: fill_cpu_cache_info
For level=(0-2) it's identical to `fill_cpu_cache_info`. […]
I guess you imply that: Use fill_cpu_cache_info which intern can call SoC specific handler(say soc_fill_cpu_cache_info) which if returns valid data then use it else fallback to previous implementation? If so then yes I can update it in that way. Also with the cpu_cache_info in heap, zen_2_3_init can update it & can be update the information in soc_fill_cpu_cache_info for level 3.
Let me know your thought & suggestion/improvements on that. Thanks
https://review.coreboot.org/c/coreboot/+/85640/comment/2c0c8456_71fe8b85?usp... : PS3, Line 60: struct cpu_cache_info info_list
Can you move `struct cpu_cache_info` to the heap and fill it in `zen_2_3_init` for LVL3 only?
Yes.
https://review.coreboot.org/c/coreboot/+/85640/comment/326e67a3_39ae0f0b?usp... : PS3, Line 66: memcpy(info, &info_list[0], sizeof(*info));
Oh, wait. This is only copying one element of the array. […]
Acknowledged
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Naresh Solanki (Code Review)