Change in coreboot[master]: soc/amd/stoneyridge/southbridge.c: Fix get_index_bit limit check

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27162

Change subject: soc/amd/stoneyridge/southbridge.c: Fix get_index_bit limit check
......................................................................

soc/amd/stoneyridge/southbridge.c: Fix get_index_bit limit check

Limit is the maximum number of bits to be tested, however it's being checked
against the number of bytes of uint32_t. when it should be number of bits.
Create a macro to provide the number of bits, and use it instead of sizeof.

BUG=b:75996437
TEST=Add debug messages to see code passing beyond the check, build and
boot grunt, check that it passed the limit check, remove debug code.

Change-Id: Id1dfda26d789183b346b20c37fec923d996b80db
Signed-off-by: Richard Spiegel 
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/southbridge.c
2 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/27162/1

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 1750547..b0f0c55 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -355,6 +355,7 @@

#define PM1_LIMIT			16
 #define GPE0_LIMIT			28
+#define TOTAL_BITS(a)			(8 * sizeof(a))

struct stoneyridge_aoac {
    int enable;
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 02daa260..24462f2 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -697,7 +697,7 @@
    uint16_t i;
    uint32_t t;

-	if (limit >= sizeof(uint32_t))
+	if (limit >= TOTAL_BITS(uint32_t))
    	return -1;

/* get a mask of valid bits. Ex limit = 3, set bits 0-2 */