Attention is currently required from: Felix Singer, Nico Huber, Patrick Rudolph.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53925 )
Change subject: soc/intel/skylake: Set proper defaults in chipset devicetree
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Patch Set 1: Code-Review+2
(1 comment)
File src/soc/intel/skylake/chipset.cb:
https://review.coreboot.org/c/coreboot/+/53925/comment/cf1bb238_c9537b84
PS1, Line 63: n end # P2SB
: device pci 1f.2 alias pmc on
If P2SB is enabled in the devicetree but FSP hides the P2SB device before coreboot sees it, then cor […]
Thanks for clarification!
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