Change in ...coreboot[master]: arch/x86/assembly_entry: Enable long mode on x86_64

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded a new patch set (#11) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/30114 )

Change subject: arch/x86/assembly_entry: Enable long mode on x86_64
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arch/x86/assembly_entry: Enable long mode on x86_64

* Install simple page tables for long mode
* Activate long mode
* Add new Kconfig for CPUs that have 1 GiB hugepage support
* Use a minimum of two pagetables if possible
* Autodetect 1 GiB hugepage support if not known at compile time

The same approach was done on AMD based platforms.
The main reason to have a 64bit romstage, is to support rmodules.
The existing code assumes that both stages (the loader and the one
that is being relocated) have the same architecture.

Tested on qemu using KVM.
Doesn't affect existing x86_32 code.

Change-Id: I57974a55f3b778c90b3587f39e86e4eb8692ad48
Signed-off-by: Patrick Rudolph 
---
M Documentation/arch/x86/index.md
M src/arch/x86/Kconfig
M src/arch/x86/Makefile.inc
M src/arch/x86/assembly_entry.S
M src/arch/x86/c_start.S
M src/arch/x86/exit_car_x86_64.S
A src/arch/x86/long_mode.S
M src/cpu/Kconfig
M src/cpu/intel/fsp_model_406dx/Kconfig
M src/cpu/intel/haswell/Kconfig
M src/cpu/intel/model_2065x/Kconfig
M src/cpu/intel/model_206ax/Kconfig
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/baytrail/Kconfig
M src/soc/intel/braswell/Kconfig
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/fsp_baytrail/Kconfig
M src/soc/intel/fsp_broadwell_de/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/skylake/Kconfig
21 files changed, 315 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30114/11