Change in coreboot[master]: soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46302 )

Change subject: soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig
......................................................................

soc/intel/common: rewrite and clarify the Legacy 8254 Timer Kconfig

The current Kconfig help text is confusing because it talks about
enabling the Kconfig for disabling a UPD for disabling power gating.

Rewrite and clarify the help text.

Change-Id: I9637c549db1ce29f259708f316852fc2ae9e7c38
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46302
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/soc/intel/common/block/timer/Kconfig
1 file changed, 8 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/soc/intel/common/block/timer/Kconfig b/src/soc/intel/common/block/timer/Kconfig
index a214ef0..42613a8 100644
--- a/src/soc/intel/common/block/timer/Kconfig
+++ b/src/soc/intel/common/block/timer/Kconfig
@@ -8,7 +8,11 @@
    default y if PAYLOAD_SEABIOS || VGA_ROM_RUN
    default n
    help
-	  This sets the FSP UPD to enable Legacy 8254 clock gating. As per
-	  the FSP Integration guide Legacy 8254 timer clock gating UPD needs
-	  to be disabled in order to boot SeaBIOS or run OpRom,
-	  but should otherwise be enabled.
+	  Setting this makes the Legacy 8254 Timer available by disabling
+	  clock gating. This needs to be enabled in order to boot a legacy
+	  BIOS or OS not supporting other timers like PM timer or TSC.
+
+	  While SeaBIOS does not require this timer anymore, it is needed
+	  when OpRoms are being used.
+
+	  Disable this setting to save power, when the timer is not needed.