Change in ...coreboot[master]: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned

[Sricharan Ramabadhran (Code Review)]

Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29969 )

Change subject: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned
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Patch Set 21:
> Patch Set 21:
> > qc-sec while jumping from 32bit<->64bit using rmr, maps 0x8c30000 <-> 0x0 address and jumps
>
> How does this mapping work? Are you talking about page tables? Or some special mapping mechanism? Can you point to some documentation?
> >   So 0x8c30000 gets mapped to 0x0 and bootblock starts executing from 0x0 address.
>
> Why does the CPU start executing from 0x0 after reset? Can't you just make it execute from 0x8c30000 directly? Isn't that what RVBAR (or is it MVBAR?) is for?
>
> If that's not possible, can you just change QC-SEC so the first 64-bit instruction is in there (just needs to be a single jump)?

Hi Julius,
  So the mapping here happens in hardware block 'boot-remapper'.
  That said, right now, looking in to the possibility of having this implemented in qc_sec.
  Will update more on this in a couple of days.

btw, Sorry for the late reponse, was off most of last week.

Regards,
 Sricharan