Change in coreboot[master]: soc/intel/alderlake: Configure FSP UPDs for minimum assertion widths

[Furquan Shaikh (Code Review)]

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Meera Ravindranath, Patrick Rudolph.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51846 )

Change subject: soc/intel/alderlake: Configure FSP UPDs for minimum assertion widths
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Patch Set 2:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/51846/comment/36a90e73_05c466f9 
PS1, Line 276: /* Apply minimum assertion width settings if non-zero */
> 👍 .. I agree we should program the params as early in the romstage. I will push the patch ASAP. […]

Can you please ensure that this is re-evaluated for TGL and JSL too?