Change in coreboot[master]: soc/amd/cezanne/romstage: Call preload_ramstage

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58983 )

Change subject: soc/amd/cezanne/romstage: Call preload_ramstage
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Patch Set 5:

(1 comment)

File src/soc/amd/cezanne/fsp_m_params.c:

https://review.coreboot.org/c/coreboot/+/58983/comment/bf78a11c_35f45d79 
PS5, Line 181: preload_ramstage();
> Ah yeah I should have mentioned the mem_pool limitation. […]

Makes sense. I see that APOB has its own thread and buffer to cache the data.