Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76996?usp=email )
Change subject: mb/asus/p8x7x-series: Post-Haswell cleanup ......................................................................
mb/asus/p8x7x-series: Post-Haswell cleanup
Remove mainboard_get_spd() which has been replaced by mb_get_spd_map(). Drop unused includes as well.
For p8z77-m, drop setting gbe_enable for MRC path. Northbridge code can figure out the correct setting (off) itself.
Change-Id: I7a387db6c5656be7abcb6cdf8ab59310b40e9650 Signed-off-by: Keith Hui buurin@gmail.com --- M src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c 5 files changed, 0 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/76996/1
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c index 9f84b49..79b67f0 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c @@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <device/pnp_ops.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6776/nct6776.h> @@ -52,11 +51,3 @@ /* Enable UART */ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} diff --git a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c index 3a297f9e..89f9eee 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c @@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <device/pnp_ops.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6779d/nct6779d.h> @@ -50,11 +49,3 @@ /* Enable UART */ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c index 9b4fa1d..8304ad7 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c @@ -1,9 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <bootblock_common.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit.h> -#include <northbridge/intel/sandybridge/pei_data.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> @@ -42,17 +40,8 @@ */ }
-void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} - void mainboard_fill_pei_data(struct pei_data *pei) { - uint8_t spdaddr[] = {0xa0, 0xa2, 0xa4, 0xa6}; /* SMBus mul 2 */ uint16_t usbcfg[16][3] = { /* {enabled, oc_pin, cable len 0x0080=<8inches/20cm} */ {1, 0, 0x0080}, {1, 0, 0x0080}, {1, 1, 0x0080}, {1, 1, 0x0080}, {1, 2, 0x0080}, @@ -60,9 +49,6 @@ {1, 6, 0x0080}, {1, 5, 0x0080}, {1, 5, 0x0080}, {1, 6, 0x0080} };
- memcpy(pei->spd_addresses, &spdaddr, sizeof(spdaddr)); - - pei->gbe_enable = 0; /* Board uses no Intel GbE but a RTL8111F */ pei->max_ddr3_freq = 1600; /* 1333=Sandy; 1600=Ivy */
memcpy(pei->usb_port_config, &usbcfg, sizeof(usbcfg)); diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c index 42b4ebc..c16b055 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c @@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <device/pnp_ops.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> @@ -47,11 +46,3 @@ /* Enable UART */ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c index 3a297f9e..89f9eee 100644 --- a/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c +++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c @@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <device/pnp_ops.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct6779d/nct6779d.h> @@ -50,11 +49,3 @@ /* Enable UART */ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -}
-
Keith Hui (Code Review)