Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84995?usp=email )
Change subject: soc/intel/cmn/block/cse: Add API to check the current boot partition ......................................................................
soc/intel/cmn/block/cse: Add API to check the current boot partition
This patch introduces an API to check whether CSE is booting from the RW slot.
This information can be used to determine if a CSE firmware update is pending, which would help to optimize the boot flow by knowing if any reset is expected due to CSE sync.
TEST=Able to build google/brox.
Change-Id: I1a63ae9992d83b439a0f995d599ee475f7abd75b Signed-off-by: Subrata Banik subratabanik@google.com --- M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/84995/1
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index c5f0560..09281ab 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1071,6 +1071,19 @@ return !!cse_compare_sub_part_version(&cbfs_rw_version, cse_get_rw_version()); }
+bool is_cse_boot_to_rw(void) +{ + if (cse_get_bp_info() != CB_SUCCESS) { + printk(BIOS_ERR, "cse_lite: Failed to get CSE boot partition info\n"); + return false; + } + + if (cse_get_current_bp() == RW) + return true; + + return false; +} + static uint8_t cse_fw_update(void) { struct region_device target_rdev; diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 552eb7b..c97e4ec 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -611,4 +611,11 @@ * Returns true if an update is required, false otherwise */ bool is_cse_fw_update_required(void); + +/* + * Check if the CSE firmware is booting from RW slot. + * Returns true if CSE is booting from RW slot, false otherwise + */ +bool is_cse_boot_to_rw(void); + #endif // SOC_INTEL_COMMON_CSE_H