HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31256
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
sb/intel/i82801gx: Use big enough type for left-shift
Change-Id: I4abe406adeee0aa5df9e4ee067b1685e2e964717 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801gx/early_init.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/usb_ehci.c 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/31256/1
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index f1866a5..d453809 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -243,7 +243,7 @@
// VCi Resource Control reg32 = pci_read_config32(dev, 0x120); - reg32 |= (1 << 31); + reg32 |= (1U << 31); reg32 |= (1 << 24); // VCi ID reg32 |= (0x80 << 0); // VCi map pci_write_config32(dev, 0x120, reg32); diff --git a/src/southbridge/intel/i82801gx/early_init.c b/src/southbridge/intel/i82801gx/early_init.c index 6679105..3c57614 100644 --- a/src/southbridge/intel/i82801gx/early_init.c +++ b/src/southbridge/intel/i82801gx/early_init.c @@ -42,7 +42,7 @@ pci_write_config32(PCI_DEV(0, 0x1d, 7), 0xfc, reg32);
reg32 = pci_read_config32(PCI_DEV(0, 0x1d, 7), 0xdc); - reg32 |= (1 << 31) | (1 << 27); + reg32 |= (1U << 31) | (1 << 27); pci_write_config32(PCI_DEV(0, 0x1d, 7), 0xdc, reg32);
RCBA32(0x0088) = 0x0011d000; diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 7497c79..13380d2 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -316,7 +316,7 @@
/* Enable Clock Gating for most devices */ reg32 = RCBA32(CG); - reg32 |= (1 << 31); // LPC clock gating + reg32 |= (1U << 31); // LPC clock gating reg32 |= (1 << 30); // PATA clock gating // SATA clock gating reg32 |= (1 << 27) | (1 << 26) | (1 << 25) | (1 << 24); diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c index b40c83d..b58ef6b 100644 --- a/src/southbridge/intel/i82801gx/usb_ehci.c +++ b/src/southbridge/intel/i82801gx/usb_ehci.c @@ -36,7 +36,7 @@ pci_write_config32(dev, PCI_COMMAND, reg32);
reg32 = pci_read_config32(dev, 0xdc); - reg32 |= (1 << 31) | (1 << 27); + reg32 |= (1U << 31) | (1 << 27); pci_write_config32(dev, 0xdc, reg32);
reg32 = pci_read_config32(dev, 0xfc);
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31256 )
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
Patch Set 1:
Nico commented, that UL is needed to guarantee 64-bit width.
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31256 )
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
Patch Set 1:
Nico commented, that UL is needed to guarantee 64-bit width.
here it is a 32, not a 64bit, isn't it ?
Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31256
to look at the new patch set (#2).
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
sb/intel/i82801gx: Use big enough type for left-shift
Change-Id: I4abe406adeee0aa5df9e4ee067b1685e2e964717 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/usb_ehci.c 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/31256/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31256 )
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
Patch Set 2: Code-Review+1
Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31256
to look at the new patch set (#4).
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
sb/intel/i82801gx: Use big enough type for left-shift
Change-Id: I4abe406adeee0aa5df9e4ee067b1685e2e964717 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801gx/usb_ehci.c 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/31256/4
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31256 )
Change subject: sb/intel/i82801gx: Use big enough type for left-shift ......................................................................
Abandoned
-
HAOUAS Elyes (Code Review) -
Paul Menzel (Code Review)