[XS] Change in coreboot[main]: soc/intel/common/block/power_limit: Disable RAPL via MSR completely - coreboot-gerrit

23 Dec 2024


      Attention is currently required from: Mario Scheithauer, Werner Zeh.
Johannes Hahn has posted comments on this change by Johannes Hahn. ( https://review.coreboot.org/c/coreboot/+/85606?usp=email )
Change subject: soc/intel/common/block/power_limit: Disable RAPL via MSR completely
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Patch Set 4:
(1 comment)
File src/soc/intel/common/block/power_limit/power_limit.c:
https://review.coreboot.org/c/coreboot/+/85606/comment/8b884804_e34de51c?usp... :
PS3, Line 95: *
...
I think you don't need the star at this point. […]
Done
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I8272339a991667d5ba177f4755ec40e1961d729e
Gerrit-Change-Number: 85606
Gerrit-PatchSet: 4
Gerrit-Owner: Johannes Hahn johannes-hahn@siemens.com
Gerrit-Reviewer: Mario Scheithauer mario.scheithauer@siemens.com
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Gerrit-Comment-Date: Mon, 23 Dec 2024 08:54:34 +0000
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