Attention is currently required from: Nicholas Sudsgaard.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80343?usp=email )
Change subject: mainboard/lenovo: Add ThinkCentre M710s (Skylake)
......................................................................
Patch Set 27:
(1 comment)
File src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80343/comment/dfa54380_02efaf10 :
PS27, Line 12: register "PcieRpClkReqSupport[0]" = "true"
: register "PcieRpClkReqNumber[0]" = "2"
: register "PcieRpClkSrcNumber[0]" = "0"
I think the FSP UPDs exist, but they may not be exposed as devicetree settings.
I just checked. The UPDs are hooked up to these settings. They just have the same name. Is that why you think they are not hooked up?
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