Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/25324
Change subject: purism/librem_skl: Add AC/DC LoadLine to VR Config ......................................................................
purism/librem_skl: Add AC/DC LoadLine to VR Config
The FSP 2.0 needs to set the ac_loadline and dc_loadline for each VR config. Without it, the Loadline is considered to be 0 mOhm and this causes CPU temp to jump all over the place whenever the CPU is used.
These values were copied from the Google Poppy devicetree.
Change-Id: I6aeb6ee521988b94f2ae94a60d1a28b87ba984d4 Signed-off-by: Youness Alaoui youness.alaoui@puri.sm --- M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb 2 files changed, 50 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/25324/1
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 159d921..86808eb 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -31,8 +31,8 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
- # Enable DPTF - register "dptf_enable" = "1" + # Disable DPTF + register "dptf_enable" = "0"
# FSP Configuration register "ProbelessTrace" = "0" @@ -82,19 +82,21 @@ register "pirqh_routing" = "PCH_IRQ11"
# VR Settings Configuration for 4 Domains - #+----------------+-------+-------+-------------+-------+ - #| Domain/Setting | SA | IA | GT Unsliced | GT | - #+----------------+-------+-------+-------------+-------+ - #| Psi1Threshold | 20A | 20A | 20A | 20A | - #| Psi2Threshold | 4A | 5A | 5A | 5A | - #| Psi3Threshold | 1A | 1A | 1A | 1A | - #| Psi3Enable | 1 | 1 | 1 | 1 | - #| Psi4Enable | 1 | 1 | 1 | 1 | - #| ImonSlope | 0 | 0 | 0 | 0 | - #| ImonOffset | 0 | 0 | 0 | 0 | - #| IccMax | 7A | 34A | 35A | 35A | - #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | - #+----------------+-------+-------+-------------+-------+ + #+----------------+-----------+-----------+-------------+----------+ + #| Domain/Setting | SA | IA | GT Unsliced | GT | + #+----------------+-----------+-----------+-------------+----------+ + #| Psi1Threshold | 20A | 20A | 20A | 20A | + #| Psi2Threshold | 4A | 5A | 5A | 5A | + #| Psi3Threshold | 1A | 1A | 1A | 1A | + #| Psi3Enable | 1 | 1 | 1 | 1 | + #| Psi4Enable | 1 | 1 | 1 | 1 | + #| ImonSlope | 0 | 0 | 0 | 0 | + #| ImonOffset | 0 | 0 | 0 | 0 | + #| IccMax | 7A | 34A | 35A | 35A | + #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | + #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm | + #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm | + #+----------------+-----------+-----------+-------------+----------+ register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ .vr_config_enable = 1, .psi1threshold = VR_CFG_AMP(20), @@ -106,6 +108,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(7), .voltage_limit = 1520, + .ac_loadline = 1500, + .dc_loadline = 1430, }"
register "domain_vr_config[VR_IA_CORE]" = "{ @@ -119,6 +123,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(34), .voltage_limit = 1520, + .ac_loadline = 570, + .dc_loadline = 483, }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{ @@ -132,6 +138,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, + .ac_loadline = 520, + .dc_loadline = 420, }"
register "domain_vr_config[VR_GT_SLICED]" = "{ @@ -145,6 +153,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, + .ac_loadline = 520, + .dc_loadline = 420, }"
# Enable Root Ports 5 and 9 diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index 035db18..fddb0aa 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -31,8 +31,8 @@ # Enable "Intel Speed Shift Technology" register "speed_shift_enable" = "1"
- # Enable DPTF - register "dptf_enable" = "1" + # Disable DPTF + register "dptf_enable" = "0"
# FSP Configuration register "ProbelessTrace" = "0" @@ -82,19 +82,21 @@ register "pirqh_routing" = "PCH_IRQ11"
# VR Settings Configuration for 4 Domains - #+----------------+-------+-------+-------------+-------+ - #| Domain/Setting | SA | IA | GT Unsliced | GT | - #+----------------+-------+-------+-------------+-------+ - #| Psi1Threshold | 20A | 20A | 20A | 20A | - #| Psi2Threshold | 4A | 5A | 5A | 5A | - #| Psi3Threshold | 1A | 1A | 1A | 1A | - #| Psi3Enable | 1 | 1 | 1 | 1 | - #| Psi4Enable | 1 | 1 | 1 | 1 | - #| ImonSlope | 0 | 0 | 0 | 0 | - #| ImonOffset | 0 | 0 | 0 | 0 | - #| IccMax | 7A | 34A | 35A | 35A | - #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | - #+----------------+-------+-------+-------------+-------+ + #+----------------+-----------+-----------+-------------+----------+ + #| Domain/Setting | SA | IA | GT Unsliced | GT | + #+----------------+-----------+-----------+-------------+----------+ + #| Psi1Threshold | 20A | 20A | 20A | 20A | + #| Psi2Threshold | 4A | 5A | 5A | 5A | + #| Psi3Threshold | 1A | 1A | 1A | 1A | + #| Psi3Enable | 1 | 1 | 1 | 1 | + #| Psi4Enable | 1 | 1 | 1 | 1 | + #| ImonSlope | 0 | 0 | 0 | 0 | + #| ImonOffset | 0 | 0 | 0 | 0 | + #| IccMax | 7A | 34A | 35A | 35A | + #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | + #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm | + #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm | + #+----------------+-----------+-----------+-------------+----------+ register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ .vr_config_enable = 1, .psi1threshold = VR_CFG_AMP(20), @@ -106,6 +108,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(7), .voltage_limit = 1520, + .ac_loadline = 1500, + .dc_loadline = 1430, }"
register "domain_vr_config[VR_IA_CORE]" = "{ @@ -119,6 +123,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(34), .voltage_limit = 1520, + .ac_loadline = 570, + .dc_loadline = 483, }"
register "domain_vr_config[VR_GT_UNSLICED]" = "{ @@ -132,6 +138,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, + .ac_loadline = 520, + .dc_loadline = 420, }"
register "domain_vr_config[VR_GT_SLICED]" = "{ @@ -145,6 +153,8 @@ .imon_offset = 0x0, .icc_max = VR_CFG_AMP(35), .voltage_limit = 1520, + .ac_loadline = 520, + .dc_loadline = 420, }"
# Enable Root Ports 5 and 9
-
Matt DeVillier (Code Review)