[S] Change in coreboot[master]: soc/intel/alderlake: skip external buses for D-states list - coreboot-gerrit

30 Nov 2022


      Attention is currently required from: Subrata Banik.
Eran Mitrani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70163 )
Change subject: soc/intel/alderlake: skip external buses for D-states list
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/70163/comment/d5d4915a_e85941a4 
PS1, Line 9: The devices in the list that was introduced in commit
...
...
Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commi […]
Done
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/70163
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3785b2b2af85d96e2e1296b6cfdefcd72080b5fe
Gerrit-Change-Number: 70163
Gerrit-PatchSet: 5
Gerrit-Owner: Eran Mitrani mitrani@google.com
Gerrit-Reviewer: Subrata Banik subratabanik@google.com
Gerrit-Reviewer: Tarun Tuli taruntuli@google.com
Gerrit-CC: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Attention: Subrata Banik subratabanik@google.com
Gerrit-Comment-Date: Tue, 29 Nov 2022 22:45:42 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Eran Mitrani mitrani@google.com
Gerrit-MessageType: comment