[S] Change in coreboot[master]: soc/intel/elkhartlake: Make PCIe root port max payload size configurable

[Mario Scheithauer (Code Review)]

Attention is currently required from: Paul Menzel, Lean Sheng Tan.

Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75126 )

Change subject: soc/intel/elkhartlake: Make PCIe root port max payload size configurable
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/75126/comment/10d82fb1_603993c6 
PS2, Line 10: higher payload
> higher/bigger payload size

Done

File src/soc/intel/elkhartlake/chip.h:

https://review.coreboot.org/c/coreboot/+/75126/comment/61aa3f50_5c5663e8 
PS2, Line 242: PCIE
> Above it’s spelled PCIe.

Done

https://review.coreboot.org/c/coreboot/+/75126/comment/05ffc6ef_c2729784 
PS2, Line 242: 	/* PCIE RP Max Payload, Max Payload Size supported */
> Mention the default?

Done