Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: soc/intel/common/block/acpi: Factor out common buttons.asl ......................................................................
soc/intel/common/block/acpi: Factor out common buttons.asl
This patch moves mainboard.asl into common block acpi directory and renams as buttons.asl to make it meaningful in purpose and avoid duplicating the same ASL code block across mainboard directory.
TEST=Able to build and boot TGLRVP platform. 1) Dump and disassemble DSDT, verify PWRB device present inside common buttons.asl is still there. 2) Verify no ACPI error seen while running 'dmesg` from console.
Change-Id: I8f9d73048041d42d809750fdb52092f40ab8f11f Signed-off-by: Subrata Banik subrata.banik@intel.com --- D src/mainboard/intel/icelake_rvp/acpi/mainboard.asl M src/mainboard/intel/icelake_rvp/dsdt.asl D src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl M src/mainboard/intel/jasperlake_rvp/dsdt.asl D src/mainboard/intel/kblrvp/acpi/mainboard.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl D src/mainboard/intel/tglrvp/acpi/mainboard.asl M src/mainboard/intel/tglrvp/dsdt.asl R src/soc/intel/common/block/acpi/acpi/buttons.asl 10 files changed, 8 insertions(+), 59 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/46268/1
diff --git a/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl b/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 41a9c0a..6d6749e 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -43,11 +43,8 @@ /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> } + #include <soc/intel/common/block/acpi/acpi/buttons.asl> #endif
#include <southbridge/intel/common/acpi/sleepstates.asl> - - // Mainboard specific - #include "acpi/mainboard.asl" - } diff --git a/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl b/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl index ce781e2..83bfe50 100644 --- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl +++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl @@ -43,11 +43,8 @@ /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> } + #include <soc/intel/common/block/acpi/acpi/buttons.asl> #endif
#include <southbridge/intel/common/acpi/sleepstates.asl> - - /* Mainboard specific */ - #include "acpi/mainboard.asl" - } diff --git a/src/mainboard/intel/kblrvp/acpi/mainboard.asl b/src/mainboard/intel/kblrvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/kblrvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 6eee06a..5fead4e 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -40,8 +40,9 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- #include <southbridge/intel/common/acpi/sleepstates.asl> +#if CONFIG(EC_GOOGLE_CHROMEEC) + #include <soc/intel/common/block/acpi/acpi/buttons.asl> +#endif
- // Mainboard specific - #include "acpi/mainboard.asl" + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index 7159577..4098f4f 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -35,5 +35,5 @@ #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific - #include "acpi/mainboard.asl" + #include <soc/intel/common/block/acpi/acpi/buttons.asl> } diff --git a/src/mainboard/intel/tglrvp/acpi/mainboard.asl b/src/mainboard/intel/tglrvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/tglrvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl index 5cde1de..e98ae68 100644 --- a/src/mainboard/intel/tglrvp/dsdt.asl +++ b/src/mainboard/intel/tglrvp/dsdt.asl @@ -45,13 +45,11 @@ /* ACPI code for EC functions */ #include <ec/google/chromeec/acpi/ec.asl> } + #include <soc/intel/common/block/acpi/acpi/buttons.asl> #endif
#include <southbridge/intel/common/acpi/sleepstates.asl>
- /* Mainboard specific */ - #include "acpi/mainboard.asl" - /* Camera */ #include "acpi/mipi_camera.asl" } diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/soc/intel/common/block/acpi/acpi/buttons.asl similarity index 100% rename from src/mainboard/intel/kunimitsu/acpi/mainboard.asl rename to src/soc/intel/common/block/acpi/acpi/buttons.asl
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: soc/intel/common/block/acpi: Factor out common buttons.asl ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB) Why does ChromeOS need this ACPI device? See CB:38134 for reasons to not have this in ACPI tables.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: soc/intel/common/block/acpi: Factor out common buttons.asl ......................................................................
Patch Set 1:
(1 comment)
HI Duncan,
if you can help on this?
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
Why does ChromeOS need this ACPI device? See CB:38134 for reasons to not have this in ACPI tables.
I could see on Chrome OS, PWRB has listed as valid wake source from S3 and S0ix
I will add Duncan to get more details. Ideally non-chrome design doesn't need this soft device
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: soc/intel/common/block/acpi: Factor out common buttons.asl ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
I could see on Chrome OS, PWRB has listed as valid wake source from S3 and S0ix […]
This is not required. Please see the commit message here: https://review.coreboot.org/c/coreboot/+/27272/4//COMMIT_MSG
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: soc/intel/common/block/acpi: Factor out common buttons.asl ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
This is not required. Please see the commit message here: https://review.coreboot. […]
Then good to clear up and remove all instance of PWRB from intel/mainboard @Furquan?
Hello build bot (Jenkins), Furquan Shaikh, Duncan Laurie, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, HAOUAS Elyes,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46268
to look at the new patch set (#2).
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
mb/intel: Get rid of power button device in coreboot
Refer to commit d7b88dc (mb/google/x86-boards: Get rid of power button device in coreboot)
This change gets rid of the generic hardware power button from all intel mainboards and relies completely on the fixed hardware power button.
Change-Id: I8f9d73048041d42d809750fdb52092f40ab8f11f Signed-off-by: Subrata Banik subrata.banik@intel.com --- D src/mainboard/intel/icelake_rvp/acpi/mainboard.asl M src/mainboard/intel/icelake_rvp/dsdt.asl D src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl M src/mainboard/intel/jasperlake_rvp/dsdt.asl D src/mainboard/intel/kblrvp/acpi/mainboard.asl M src/mainboard/intel/kblrvp/dsdt.asl D src/mainboard/intel/kunimitsu/acpi/mainboard.asl M src/mainboard/intel/kunimitsu/dsdt.asl D src/mainboard/intel/tglrvp/acpi/mainboard.asl M src/mainboard/intel/tglrvp/dsdt.asl 10 files changed, 0 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/46268/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
Then good to clear up and remove all instance of PWRB from intel/mainboard @Furquan?
Ack
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
Ack
Yes, the way to go is to drop all power button instances.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... File src/mainboard/intel/icelake_rvp/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/46268/1/src/mainboard/intel/icelake... PS1, Line 6: Device (PWRB)
Yes, the way to go is to drop all power button instances.
👍
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
a git grep "Device.*PWRB" -- *.asl shows more mainboards than this. what about baskingridge, d945gclf, emeraldlake2, harcuvar, strago, and wtm2 ?
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
Patch Set 2:
a git grep "Device.*PWRB" -- *.asl shows more mainboards than this. what about baskingridge, d945gclf, emeraldlake2, harcuvar, strago, and wtm2 ?
Yes Tim, i have cleaned all latest IA mainboards
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
Patch Set 2:
a git grep "Device.*PWRB" -- *.asl shows more mainboards than this. what about baskingridge, d945gclf, emeraldlake2, harcuvar, strago, and wtm2 ?
I think it would be better to handle these older boards in a separate patch. It's not so easy to test them, I believe.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel: Get rid of power button device in coreboot ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46268/2//COMMIT_MSG@13 PS2, Line 13: intel nit: then this isn't really all 😊 all "modern" intel mainboards?
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Duncan Laurie, Angel Pons, Patrick Rudolph, HAOUAS Elyes,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46268
to look at the new patch set (#3).
Change subject: mb/intel/latest mainboards: Get rid of power button device in coreboot ......................................................................
mb/intel/latest mainboards: Get rid of power button device in coreboot
Refer to commit d7b88dc (mb/google/x86-boards: Get rid of power button device in coreboot)
This change gets rid of the generic hardware power button from all intel mainboards and relies completely on the fixed hardware power button.
Change-Id: I8f9d73048041d42d809750fdb52092f40ab8f11f Signed-off-by: Subrata Banik subrata.banik@intel.com --- D src/mainboard/intel/icelake_rvp/acpi/mainboard.asl M src/mainboard/intel/icelake_rvp/dsdt.asl D src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl M src/mainboard/intel/jasperlake_rvp/dsdt.asl D src/mainboard/intel/kblrvp/acpi/mainboard.asl M src/mainboard/intel/kblrvp/dsdt.asl D src/mainboard/intel/kunimitsu/acpi/mainboard.asl M src/mainboard/intel/kunimitsu/dsdt.asl D src/mainboard/intel/tglrvp/acpi/mainboard.asl M src/mainboard/intel/tglrvp/dsdt.asl 10 files changed, 0 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/46268/3
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel/latest mainboards: Get rid of power button device in coreboot ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46268/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46268/2//COMMIT_MSG@13 PS2, Line 13: intel
nit: then this isn't really all 😊 all "modern" intel mainboards?
Ack
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46268 )
Change subject: mb/intel/latest mainboards: Get rid of power button device in coreboot ......................................................................
mb/intel/latest mainboards: Get rid of power button device in coreboot
Refer to commit d7b88dc (mb/google/x86-boards: Get rid of power button device in coreboot)
This change gets rid of the generic hardware power button from all intel mainboards and relies completely on the fixed hardware power button.
Change-Id: I8f9d73048041d42d809750fdb52092f40ab8f11f Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46268 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Furquan Shaikh furquan@google.com --- D src/mainboard/intel/icelake_rvp/acpi/mainboard.asl M src/mainboard/intel/icelake_rvp/dsdt.asl D src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl M src/mainboard/intel/jasperlake_rvp/dsdt.asl D src/mainboard/intel/kblrvp/acpi/mainboard.asl M src/mainboard/intel/kblrvp/dsdt.asl D src/mainboard/intel/kunimitsu/acpi/mainboard.asl M src/mainboard/intel/kunimitsu/dsdt.asl D src/mainboard/intel/tglrvp/acpi/mainboard.asl M src/mainboard/intel/tglrvp/dsdt.asl 10 files changed, 0 insertions(+), 70 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl b/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/icelake_rvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 41a9c0a..861ccb1 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -46,8 +46,4 @@ #endif
#include <southbridge/intel/common/acpi/sleepstates.asl> - - // Mainboard specific - #include "acpi/mainboard.asl" - } diff --git a/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl b/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/jasperlake_rvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl index ce781e2..5da2c12 100644 --- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl +++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl @@ -46,8 +46,4 @@ #endif
#include <southbridge/intel/common/acpi/sleepstates.asl> - - /* Mainboard specific */ - #include "acpi/mainboard.asl" - } diff --git a/src/mainboard/intel/kblrvp/acpi/mainboard.asl b/src/mainboard/intel/kblrvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/kblrvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 6eee06a..256dda0 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -41,7 +41,4 @@ #endif
#include <southbridge/intel/common/acpi/sleepstates.asl> - - // Mainboard specific - #include "acpi/mainboard.asl" } diff --git a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl b/src/mainboard/intel/kunimitsu/acpi/mainboard.asl deleted file mode 100644 index d9fdd02..0000000 --- a/src/mainboard/intel/kunimitsu/acpi/mainboard.asl +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index 7159577..17d4165 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -33,7 +33,4 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl> - - // Mainboard specific - #include "acpi/mainboard.asl" } diff --git a/src/mainboard/intel/tglrvp/acpi/mainboard.asl b/src/mainboard/intel/tglrvp/acpi/mainboard.asl deleted file mode 100644 index 4670015..0000000 --- a/src/mainboard/intel/tglrvp/acpi/mainboard.asl +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#if CONFIG(EC_GOOGLE_CHROMEEC) -Scope (_SB) -{ - Device (PWRB) - { - Name (_HID, EisaId ("PNP0C0C")) - } -} -#endif diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl index 5cde1de..5b76bd4 100644 --- a/src/mainboard/intel/tglrvp/dsdt.asl +++ b/src/mainboard/intel/tglrvp/dsdt.asl @@ -49,9 +49,6 @@
#include <southbridge/intel/common/acpi/sleepstates.asl>
- /* Mainboard specific */ - #include "acpi/mainboard.asl" - /* Camera */ #include "acpi/mipi_camera.asl" }
-
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