Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33202
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
soc/intel/broadwell: Use common SB RTC code
Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/pmutil.c 2 files changed, 1 insertion(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/33202/1
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 89a3c4c..deb5ef3 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -22,6 +22,7 @@ select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_RTC select HAVE_USBDEBUG select IOAPIC select REG_SCRIPT diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c index 322e96f..00db615 100644 --- a/src/soc/intel/broadwell/pmutil.c +++ b/src/soc/intel/broadwell/pmutil.c @@ -451,32 +451,6 @@ return sci_irq; }
-int rtc_failure(void) -{ - u8 reg8; - int rtc_failed; -#if defined(__SIMPLE_DEVICE__) - pci_devfn_t dev = PCH_DEV_LPC; -#else - struct device *dev = PCH_DEV_LPC; -#endif - - reg8 = pci_read_config8(dev, GEN_PMCON_3); - rtc_failed = reg8 & RTC_BATTERY_DEAD; - if (rtc_failed) { - reg8 &= ~RTC_BATTERY_DEAD; - pci_write_config8(dev, GEN_PMCON_3, reg8); - printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); - } - - return !!rtc_failed; -} - -int vbnv_cmos_failed(void) -{ - return rtc_failure(); -} - int vboot_platform_is_resuming(void) { if (!(inw(ACPI_BASE_ADDRESS + PM1_STS) & WAK_STS))
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33202
to look at the new patch set (#6).
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
soc/intel/broadwell: Use common SB RTC code
Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/pmutil.c 2 files changed, 1 insertion(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/33202/6
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33202 )
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
Patch Set 16:
Also replace pch_rtc_init()?
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33202
to look at the new patch set (#17).
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
soc/intel/broadwell: Use common SB RTC code
Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/include/soc/pm.h M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/pmutil.c 4 files changed, 3 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/33202/17
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33202 )
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
Patch Set 17:
Patch Set 16:
Also replace pch_rtc_init()?
Done.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33202 )
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
Patch Set 17: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/33202 )
Change subject: soc/intel/broadwell: Use common SB RTC code ......................................................................
soc/intel/broadwell: Use common SB RTC code
Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33202 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/include/soc/pm.h M src/soc/intel/broadwell/lpc.c M src/soc/intel/broadwell/pmutil.c 4 files changed, 3 insertions(+), 35 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 0bbb668..f69c7de 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -19,6 +19,7 @@ select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_RTC select HAVE_USBDEBUG select IOAPIC select REG_SCRIPT diff --git a/src/soc/intel/broadwell/include/soc/pm.h b/src/soc/intel/broadwell/include/soc/pm.h index 343cf2b..18004fa 100644 --- a/src/soc/intel/broadwell/include/soc/pm.h +++ b/src/soc/intel/broadwell/include/soc/pm.h @@ -155,7 +155,4 @@ /* Return the selected ACPI SCI IRQ */ int acpi_sci_irq(void);
-/* Return non-zero when RTC failure happened. */ -int rtc_failure(void); - #endif diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 873f594..3392614 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -42,6 +42,7 @@ #include <soc/rcba.h> #include <soc/intel/broadwell/chip.h> #include <arch/acpigen.h> +#include <southbridge/intel/common/rtc.h>
static void pch_enable_ioapic(struct device *dev) { @@ -190,11 +191,6 @@ enable_alt_smi(config->alt_gp_smi_en); }
-static void pch_rtc_init(struct device *dev) -{ - cmos_init(rtc_failure()); -} - static const struct reg_script pch_misc_init_script[] = { /* Setup SLP signal assertion, SLP_S4=4s, SLP_S3=50ms */ REG_PCI_RMW16(GEN_PMCON_3, ~((3 << 4)|(1 << 10)), @@ -439,7 +435,7 @@ { /* Legacy initialization */ isa_dma_init(); - pch_rtc_init(dev); + sb_rtc_init(); reg_script_run_on_dev(dev, pch_misc_init_script);
/* Interrupt configuration */ diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c index 322e96f..00db615 100644 --- a/src/soc/intel/broadwell/pmutil.c +++ b/src/soc/intel/broadwell/pmutil.c @@ -451,32 +451,6 @@ return sci_irq; }
-int rtc_failure(void) -{ - u8 reg8; - int rtc_failed; -#if defined(__SIMPLE_DEVICE__) - pci_devfn_t dev = PCH_DEV_LPC; -#else - struct device *dev = PCH_DEV_LPC; -#endif - - reg8 = pci_read_config8(dev, GEN_PMCON_3); - rtc_failed = reg8 & RTC_BATTERY_DEAD; - if (rtc_failed) { - reg8 &= ~RTC_BATTERY_DEAD; - pci_write_config8(dev, GEN_PMCON_3, reg8); - printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); - } - - return !!rtc_failed; -} - -int vbnv_cmos_failed(void) -{ - return rtc_failure(); -} - int vboot_platform_is_resuming(void) { if (!(inw(ACPI_BASE_ADDRESS + PM1_STS) & WAK_STS))
-
Arthur Heymans (Code Review) -
Nico Huber (Code Review)