Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32398
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
mb/google/hatch/var/kohaku: Skip UART0 config in FSP
Similar to hatch(CB:32278), this change sets SerialIo config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.
BUG=b:130310626
Change-Id: Ia25b45811be26d55fc0019e4cd22eb7310b5a4c4 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/32398/1
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 6e6414e..d564918 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -10,9 +10,12 @@ [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, - [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ device domain 0 on + end + end
Hello Kane Chen, Tim Wawrzynczak, Shelley Chen,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32398
to look at the new patch set (#2).
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
mb/google/hatch/var/kohaku: Skip UART0 config in FSP
Similar to hatch(CB:32278), this change sets SerialIo config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.
This change also adds a device to kohaku override tree to ensure that the settings in it take effect.
BUG=b:130310626
Change-Id: Ia25b45811be26d55fc0019e4cd22eb7310b5a4c4 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/32398/2
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32398 )
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
Patch Set 2:
Hi Fuquan, we also need this change. Do you think this require another commit?
thanks.
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index d564918..606a3b5 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -15,6 +15,13 @@ chip soc/intel/cannonlake [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + }" +
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32398 )
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
Patch Set 2:
Patch Set 2:
Hi Fuquan, we also need this change. Do you think this require another commit?
thanks.
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index d564918..606a3b5 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -15,6 +15,13 @@ chip soc/intel/cannonlake [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
}"
Done: https://review.coreboot.org/c/coreboot/+/32402
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32398 )
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32398 )
Change subject: mb/google/hatch/var/kohaku: Skip UART0 config in FSP ......................................................................
mb/google/hatch/var/kohaku: Skip UART0 config in FSP
Similar to hatch(CB:32278), this change sets SerialIo config for UART0 to PchSerialIoSkipInit to skip initialization in FSP.
This change also adds a device to kohaku override tree to ensure that the settings in it take effect.
BUG=b:130310626
Change-Id: Ia25b45811be26d55fc0019e4cd22eb7310b5a4c4 Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32398 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 4 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 6e6414e..d564918 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -10,9 +10,12 @@ [PchSerialIoIndexSPI0] = PchSerialIoPci, [PchSerialIoIndexSPI1] = PchSerialIoPci, [PchSerialIoIndexSPI2] = PchSerialIoDisabled, - [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART0] = PchSerialIoSkipInit, [PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ device domain 0 on + end + end