Change in coreboot[4.11_branch]: security/intel/stm: Add STM support

[Marc Jones (Code Review)]

Attention is currently required from: Martin Roth, Jay Talbott.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50308 )

Change subject: security/intel/stm: Add STM support
......................................................................

Patch Set 2:

(1 comment)

File src/cpu/x86/mp_init.c:

https://review.coreboot.org/c/coreboot/+/50308/comment/f1611db4_65e52179 
PS1, Line 1051: In the future, this will need to handle newer x86 processors
              : 	 * that require alignment of the save state on 32K boundaries.
> Do we know for what generation of processors this will be required?

I don't, but I assume it is part of the STM/silicon specs.