[L] Change in coreboot[main]: Add UPL FDT handoff

[Benjamin Doron (Code Review)]

Attention is currently required from: Arthur Heymans, Jakub "Kuba" Czapiga, Julius Werner, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, Simon Glass, ron minnich.

Benjamin Doron has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/76591?usp=email )

Change subject: Add UPL FDT handoff
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Patch Set 35:

(2 comments)

File src/drivers/uart/pl011.c:

https://review.coreboot.org/c/coreboot/+/76591/comment/ae4e7cd9_cda1d0a7?usp... :
PS24, Line 96: uint8_t
> Are you sure this shouldn't be uint32_t?

I've checked the PL011 TRM and a Rockchip SoC TRM, because I had it on hand, and yes, this should be uint32_t.

File src/lib/upl_fdt_table.c:

https://review.coreboot.org/c/coreboot/+/76591/comment/b37bc6ad_1a6e2944?usp... :
PS24, Line 54: 	header.reserve_map_offset = cpu_to_be32(ALIGN_UP(dev_tree.header_size, 16));
> You can change to 8 byte alignment (as per spec), but I don't see why you would remove the ALIGN_UP. […]

Ah, got it. I wasn't sure which to do, since both aligning on 8 bytes and 16 had the same effect.