Attention is currently required from: Paul Menzel, Julius Werner. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64673 )
Change subject: soc/qualcomm: Increase SPI frequency to 75 MHz ......................................................................
Patch Set 5:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/64673/comment/45804643_f92930bf PS4, Line 9: Increasing
Increase
Done
File src/soc/qualcomm/common/include/soc/qspi_common.h:
https://review.coreboot.org/c/coreboot/+/64673/comment/7721a3a6_1add0c90 PS4, Line 104: hz
Hz
Done
File src/soc/qualcomm/common/qspi.c:
https://review.coreboot.org/c/coreboot/+/64673/comment/4f5b6691_bb613671 PS4, Line 227: delay(cycle)
Space before (.
Done
https://review.coreboot.org/c/coreboot/+/64673/comment/6db54551_c4db7969 PS4, Line 229: * 0xFFFh = 1111 1111 1111b 7/8 : * 0xDB6h = 1101 1011 0110b 6/8 : * 0xB6Dh = 1011 0110 1101b 5/8 : * 0x924h = 1001 0010 0100b 4/8 : * 0x6DBh = 0110 1101 1011b 3/8 : * 0x492h = 0100 1001 0010b 2/8 : * 0x249h = 0010 0100 1001b 1/8 : * 0x000h = 0000 0000 0000b None
I'm not sure what this is supposed to mean. […]
I have to agree with Julius. I am not sure how enums would make things easier to understand here.
https://review.coreboot.org/c/coreboot/+/64673/comment/09c56329_8b92d884 PS4, Line 264: sdelay << 3 | sdelay << 0;
Fits in one line?
Done
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Shelley Chen (Code Review)