HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37520 )
Change subject: northbridge: Remove unused '#include <device/pci.h>' ......................................................................
northbridge: Remove unused '#include <device/pci.h>'
Change-Id: I942457a820a59428f7ae302262c4891a4c5ef1a6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c 13 files changed, 0 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37520/1
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index ef152db..8d4f7b1 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -19,7 +19,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h>
#include "gm45.h" diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 2625447..b297f67 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -18,7 +18,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index d92e858..a9b687b 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "haswell.h" #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index 3a9f6a2..66f26dd 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "i945.h"
diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c index 462cdc0..43b13c2 100644 --- a/src/northbridge/intel/nehalem/acpi.c +++ b/src/northbridge/intel/nehalem/acpi.c @@ -20,7 +20,6 @@
#include <types.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "nehalem.h"
diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c index 8c19852..c3433a3 100644 --- a/src/northbridge/intel/nehalem/smi.c +++ b/src/northbridge/intel/nehalem/smi.c @@ -15,7 +15,6 @@
#include <types.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "nehalem.h"
diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c index 9dd8e31..2e12305 100644 --- a/src/northbridge/intel/pineview/acpi.c +++ b/src/northbridge/intel/pineview/acpi.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> #include <types.h>
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index aec910c..1f7e36d 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -18,7 +18,6 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <device/pci_def.h> -#include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> #include <northbridge/intel/pineview/chip.h> #include <pc80/mc146818rtc.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index c082586..d939511 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -19,7 +19,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <northbridge/intel/pineview/pineview.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 4afb546..9665972 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -20,7 +20,6 @@ #include <commonlib/helpers.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "sandybridge.h" #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c index 8bfd476..d141c99 100644 --- a/src/northbridge/intel/sandybridge/common.c +++ b/src/northbridge/intel/sandybridge/common.c @@ -18,7 +18,6 @@ #include <types.h> #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include "sandybridge.h"
enum platform_type get_platform_type(void) diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index a91d227..d25eb2b 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -20,7 +20,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include "x4x.h"
unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index b7f9aaa..f2ff504 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -19,7 +19,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <northbridge/intel/x4x/iomap.h>
Hello Patrick Rudolph, build bot (Jenkins), Damien Zammit,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37520
to look at the new patch set (#4).
Change subject: northbridge: Remove unused '#include <device/pci.h>' ......................................................................
northbridge: Remove unused '#include <device/pci.h>'
Change-Id: I942457a820a59428f7ae302262c4891a4c5ef1a6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c 13 files changed, 3 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37520/4
Hello Patrick Rudolph, build bot (Jenkins), Damien Zammit,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37520
to look at the new patch set (#5).
Change subject: northbridge: Remove unused '#include <device/pci.h>' ......................................................................
northbridge: Remove unused '#include <device/pci.h>'
Change-Id: I942457a820a59428f7ae302262c4891a4c5ef1a6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c 13 files changed, 4 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37520/5
Hello Patrick Rudolph, build bot (Jenkins), Damien Zammit,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37520
to look at the new patch set (#6).
Change subject: northbridge: Remove unused include <device/pci.h> ......................................................................
northbridge: Remove unused include <device/pci.h>
Change-Id: I942457a820a59428f7ae302262c4891a4c5ef1a6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c 13 files changed, 0 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37520/6
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37520 )
Change subject: northbridge: Remove unused include <device/pci.h> ......................................................................
Patch Set 10: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37520 )
Change subject: northbridge: Remove unused include <device/pci.h> ......................................................................
northbridge: Remove unused include <device/pci.h>
Change-Id: I942457a820a59428f7ae302262c4891a4c5ef1a6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/37520 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/nehalem/smi.c M src/northbridge/intel/pineview/acpi.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c 13 files changed, 0 insertions(+), 13 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 82b6221..6035b7e 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -19,7 +19,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ops.h>
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 5ccafbb..dd5a7e2 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -19,7 +19,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index d92e858..a9b687b 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "haswell.h" #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index 3a9f6a2..66f26dd 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "i945.h"
diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c index 462cdc0..43b13c2 100644 --- a/src/northbridge/intel/nehalem/acpi.c +++ b/src/northbridge/intel/nehalem/acpi.c @@ -20,7 +20,6 @@
#include <types.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "nehalem.h"
diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c index 8c19852..c3433a3 100644 --- a/src/northbridge/intel/nehalem/smi.c +++ b/src/northbridge/intel/nehalem/smi.c @@ -15,7 +15,6 @@
#include <types.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "nehalem.h"
diff --git a/src/northbridge/intel/pineview/acpi.c b/src/northbridge/intel/pineview/acpi.c index 9dd8e31..2e12305 100644 --- a/src/northbridge/intel/pineview/acpi.c +++ b/src/northbridge/intel/pineview/acpi.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> #include <types.h>
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index 8f925f7..daf425e 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci_ops.h> #include <device/pci_def.h> -#include <device/pci.h> #include <northbridge/intel/pineview/pineview.h> #include <northbridge/intel/pineview/chip.h> #include <option.h> diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index 4193498..0b9de19 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -20,7 +20,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <northbridge/intel/pineview/pineview.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 4afb546..9665972 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -20,7 +20,6 @@ #include <commonlib/helpers.h> #include <arch/acpi.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ops.h> #include "sandybridge.h" #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c index 8bfd476..d141c99 100644 --- a/src/northbridge/intel/sandybridge/common.c +++ b/src/northbridge/intel/sandybridge/common.c @@ -18,7 +18,6 @@ #include <types.h> #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include "sandybridge.h"
enum platform_type get_platform_type(void) diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index a91d227..d25eb2b 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -20,7 +20,6 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <device/device.h> -#include <device/pci.h> #include "x4x.h"
unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index ef34a2e..0e28f56 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -20,7 +20,6 @@ #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <boot/tables.h> #include <arch/acpi.h> #include <northbridge/intel/x4x/iomap.h>
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37520 )
Change subject: northbridge: Remove unused include <device/pci.h> ......................................................................
Patch Set 11:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1155 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1154 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1153
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
HAOUAS Elyes (Code Review)
-
Patrick Georgi (Code Review)