[M] Change in coreboot[master]: soc/intel/alderlake: Add IBECC

[Maximilian Brune (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Paul Menzel, Christian Walter, Tim Wawrzynczak, Angel Pons, Lean Sheng Tan, David Milosevic.

Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68756 )

Change subject: soc/intel/alderlake: Add IBECC
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Patch Set 7:

(6 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/68756/comment/97eda0ba_1d710775 
PS5, Line 7: src/
> Drop `src/`

Done

https://review.coreboot.org/c/coreboot/+/68756/comment/eb7c76a3_7fd14bcd 
PS5, Line 7: Alderlake
> Alder Lake, but it’s redundant as it’s in the prefix.

Done

https://review.coreboot.org/c/coreboot/+/68756/comment/899e33fa_423ea5f8 
PS5, Line 10: Board
> Without capitalizing `b`? +1

Done

https://review.coreboot.org/c/coreboot/+/68756/comment/1abc0aca_557fd1a9 
PS5, Line 11:
> > Please elaborate. Is the FSP doing that? […]

Done

Patchset:

PS5:
> Should something be logged, when this is enabled?

Done

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/68756/comment/c00d04ae_a7535356 
PS5, Line 372: !!config->ibecc.enable
> It's a `bool` already

Done