Change in coreboot[master]: mb/google/drallion: Add new SPD file for drallion

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Bora Guvendik (Code Review)

9 Oct 2019 9 Oct '19

2:33 p.m.

Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.bin M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/1

diff --git a/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.bin b/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.bin new file mode 100644 index 0000000..ab2273b --- /dev/null +++ b/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.bin Binary files differ diff --git a/src/mainboard/google/drallion/variants/drallion/Makefile.inc b/src/mainboard/google/drallion/variants/drallion/Makefile.inc index ef3d54d..ccbcb08 100644 --- a/src/mainboard/google/drallion/variants/drallion/Makefile.inc +++ b/src/mainboard/google/drallion/variants/drallion/Makefile.inc @@ -22,6 +22,7 @@ SPD_SOURCES += hynix_dimm_H5ANAG6NCMR-VKC # 0b11001 SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b10011 SPD_SOURCES += samsung_dimm_K4AAG165WB-MCTD # 0b11011 +SPD_SOURCES += micron_dimm_MT40A1G16KD-062EE # 0b11010

bootblock-y += gpio.c ramstage-y += gpio.c diff --git a/src/mainboard/google/drallion/variants/drallion/memory.c b/src/mainboard/google/drallion/variants/drallion/memory.c index 37d009a..9c4135d 100644 --- a/src/mainboard/google/drallion/variants/drallion/memory.c +++ b/src/mainboard/google/drallion/variants/drallion/memory.c @@ -24,7 +24,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 3, 6, 1, 0, 0, 0, - 0, 5, 0, 7, 2, 0, 0, 0 + 0, 5, 8, 7, 2, 0, 0, 0 };

const struct cnl_mb_cfg *get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg)

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Bora Guvendik (Code Review)

9 Oct 9 Oct

2:42 p.m.

Hello build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35945

to look at the new patch set (#2).

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/2

Bora Guvendik (Code Review)

2:50 p.m.

Hello build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35945

to look at the new patch set (#3).

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/3

Bora Guvendik (Code Review)

3:38 p.m.

Hello build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35945

to look at the new patch set (#4).

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 34 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/4

build bot (Jenkins) (Code Review)

3:38 p.m.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 4:

(31 comments)

https://review.coreboot.org/c/coreboot/+/35945/4/src/mainboard/google/dralli... File src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex:

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Bora Guvendik (Code Review)

3:40 p.m.

Hello build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35945

to look at the new patch set (#5).

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 34 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/5

EricR Lai (Code Review)

8:44 p.m.

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... File src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex:

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... PS5, Line 21: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 lack of part number

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Thu, 10 Oct 2019 03:44:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Bora Guvendik (Code Review)

10 Oct 10 Oct

2:35 p.m.

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... File src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex:

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... PS5, Line 21: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

...

lack of part number

Is it needed for memory down? The SPD data I received has all 0s for part number.

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Thu, 10 Oct 2019 21:35:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-MessageType: comment

EricR Lai (Code Review)

9:25 p.m.

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... File src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex:

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... PS5, Line 21: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

...

Is it needed for memory down? The SPD data I received has all 0s for part number.

In some project part number is reported by CBI command. But we need them, I'll check, please hold on.

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Fri, 11 Oct 2019 04:25:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai ericr_lai@compal.corp-partner.google.com Comment-In-Reply-To: Bora Guvendik bora.guvendik@intel.com Gerrit-MessageType: comment

Bora Guvendik (Code Review)

14 Oct 14 Oct

12:09 p.m.

Hello Thejaswani Putta, EricR Lai, Aamir Bohra, Bernardo Perez Priego, Selma Bensaid, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35945

to look at the new patch set (#6).

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 34 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35945/6

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 6 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Bora Guvendik (Code Review)

12:11 p.m.

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... File src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex:

https://review.coreboot.org/c/coreboot/+/35945/5/src/mainboard/google/dralli... PS5, Line 21: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

...

In some project part number is reported by CBI command. […]

Updated, thanks for finding out the information.

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 6 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Mon, 14 Oct 2019 19:11:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai ericr_lai@compal.corp-partner.google.com Comment-In-Reply-To: Bora Guvendik bora.guvendik@intel.com Gerrit-MessageType: comment

EricR Lai (Code Review)

6:23 p.m.

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

Patch Set 6: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 6 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 15 Oct 2019 01:23:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Patrick Georgi (Code Review)

16 Oct 16 Oct

7:13 a.m.

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35945 )

Change subject: mb/google/drallion: Add new SPD file for drallion ......................................................................

mb/google/drallion: Add new SPD file for drallion

Add the SPD data for MT40A1G16KD-062E:E

BUG=b:139397313 TEST=Compile successfully.

Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Signed-off-by: Bora Guvendik bora.guvendik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35945 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com --- A src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex M src/mainboard/google/drallion/variants/drallion/Makefile.inc M src/mainboard/google/drallion/variants/drallion/memory.c 3 files changed, 34 insertions(+), 1 deletion(-)

Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved

diff --git a/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex b/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex new file mode 100644 index 0000000..4fe4d0e --- /dev/null +++ b/src/mainboard/google/drallion/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex @@ -0,0 +1,32 @@ +23 11 0C 03 46 29 00 08 00 60 00 03 02 03 00 00 +00 00 05 0D F8 FF 2B 00 6E 6E 6E 11 00 6E F0 0A +20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 16 36 0B 35 +16 36 0B 35 00 00 16 36 0B 35 16 36 0B 35 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 9C B5 00 00 00 00 E7 00 40 36 +0F 01 1F 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 7D 21 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 34 41 54 46 35 31 32 +36 34 48 5A 2D 33 47 32 45 31 20 20 20 31 80 2C +45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/drallion/variants/drallion/Makefile.inc b/src/mainboard/google/drallion/variants/drallion/Makefile.inc index ef3d54d..ccbcb08 100644 --- a/src/mainboard/google/drallion/variants/drallion/Makefile.inc +++ b/src/mainboard/google/drallion/variants/drallion/Makefile.inc @@ -22,6 +22,7 @@ SPD_SOURCES += hynix_dimm_H5ANAG6NCMR-VKC # 0b11001 SPD_SOURCES += samsung_dimm_K4A8G165WC-BCTD # 0b10011 SPD_SOURCES += samsung_dimm_K4AAG165WB-MCTD # 0b11011 +SPD_SOURCES += micron_dimm_MT40A1G16KD-062EE # 0b11010

const struct cnl_mb_cfg *get_variant_memory_cfg(struct cnl_mb_cfg *mem_cfg)

-- To view, visit https://review.coreboot.org/c/coreboot/+/35945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d1ae9269ff3129845a7f53dbacbab6e1b66b6d5 Gerrit-Change-Number: 35945 Gerrit-PatchSet: 7 Gerrit-Owner: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: Aamir Bohra aamir.bohra@intel.com Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Mathew King mathewk@chromium.org Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Selma Bensaid selma.bensaid@intel.com Gerrit-Reviewer: Thejaswani Putta thejaswani.putta@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

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Bora Guvendik (Code Review)
build bot (Jenkins) (Code Review)
EricR Lai (Code Review)
Patrick Georgi (Code Review)