Change in coreboot[master]: soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45954 )

Change subject: soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling
......................................................................

soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling

FSP already disables the PM ACPI timer, when EnableTcoTimer=0.

Test: clevo/l140cu and supermicro/x11ssm-f have the PM ACPI timer
disable bit set when EnableTcoTimer=0.

Change-Id: If370d3acf87ae6d1d7c64bf27228877cdd92ab2d
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45954
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/finalize.c
4 files changed, 0 insertions(+), 25 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 2b862e7..d61435a 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -98,7 +98,6 @@
    select PLATFORM_USES_FSP2_0
    select REG_SCRIPT
    select PMC_GLOBAL_RESET_ENABLE_LOCK
-	select PMC_LOW_POWER_MODE_PROGRAM
    select SOC_INTEL_COMMON
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index 3fe00ba..8387bb8 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -56,21 +56,8 @@
     */
    pch_thermal_configuration();

-	/*
-	 * Disable ACPI PM timer based on dt policy
-	 *
-	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
-	 * Disabling ACPI PM timer also switches off TCO
-	 *
-	 * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
-	 * just required to get to chip config. PCH_DEV_PMC is hidden by this
-	 * point and hence removed from the root bus. pcidev_path_on_root thus
-	 * returns NULL for PCH_DEV_PMC device.
-	 */
    config = config_of_soc();
    pmcbase = pmc_mmio_regs();
-	if (config->PmTimerDisabled)
-		pmc_disable_acpi_timer();

if (config->s0ix_enable && config->cppmvric2_adsposcdis) {
    	/* Enable Audio DSP OSC qualification for S0ix */
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 20b302d..f71beae 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -43,7 +43,6 @@
    select REG_SCRIPT
    select SA_ENABLE_DPR
    select PMC_GLOBAL_RESET_ENABLE_LOCK
-	select PMC_LOW_POWER_MODE_PROGRAM
    select SOC_INTEL_COMMON
    select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
    select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 6b8576a..f8b36a4 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -62,16 +62,6 @@
     */
    pch_thermal_configuration();

-	/*
-	 * Disable ACPI PM timer based on dt policy
-	 *
-	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
-	 * Disabling ACPI PM timer also switches off TCO
-	 */
-
-	if (config->PmTimerDisabled)
-		pmc_disable_acpi_timer();
-
    /* we should disable Heci1 based on the devicetree policy */
    if (config->HeciEnabled == 0)
    	pch_disable_heci();