Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78646?usp=email )
Change subject: arch/x86/memcpy.c: Optimize code for 64bit ......................................................................
arch/x86/memcpy.c: Optimize code for 64bit
In 64bit movsq is available which moves memory in chunks of 8 bytes rather than 4 bytes.
Linux uses the same code.
Signed-off-by: Arthur Heymans arthur@aheymans.xyz Change-Id: I65f178d2ed3aae54b0c1ce739c2b4af8738b9fcc Reviewed-on: https://review.coreboot.org/c/coreboot/+/78646 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com Reviewed-by: Eric Lai ericllai@google.com --- M src/arch/x86/memcpy.c 1 file changed, 10 insertions(+), 3 deletions(-)
Approvals: Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Felix Held: Looks good to me, but someone else must approve Eric Lai: Looks good to me, but someone else must approve
diff --git a/src/arch/x86/memcpy.c b/src/arch/x86/memcpy.c index 93002cd..d96a93c 100644 --- a/src/arch/x86/memcpy.c +++ b/src/arch/x86/memcpy.c @@ -14,19 +14,26 @@ check_memory_region((unsigned long)dest, n, true, _RET_IP_); #endif
- asm volatile( #if ENV_X86_64 - "rep ; movsd\n\t" + asm volatile( + "rep ; movsq\n\t" "mov %4,%%rcx\n\t" + "rep ; movsb\n\t" + : "=&c" (d0), "=&D" (d1), "=&S" (d2) + : "0" (n >> 3), "g" (n & 7), "1" (dest), "2" (src) + : "memory" + ); #else + asm volatile( "rep ; movsl\n\t" "movl %4,%%ecx\n\t" -#endif "rep ; movsb\n\t" : "=&c" (d0), "=&D" (d1), "=&S" (d2) : "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src) : "memory" ); +#endif +
return dest; }