Jamie Ryu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46647 )
Change subject: [WIP] soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
[WIP] soc/intel/tigerlake: Configure top swap based on microcode version
In case of FIT based FW update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
BUG=b:149547271 TEST=Build and boot volteer2 to OS
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: I25febfd946d5a82b92ba626e487eb183a0bd6286 --- M src/soc/intel/tigerlake/bootblock/report_platform.c 1 file changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46647/1
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 03d65a4..1662ba5 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -18,6 +18,9 @@ #include <soc/pch.h> #include <soc/pci_devs.h> #include <string.h> +#include <intelblocks/rtc.h> +#include <reset.h> +#include <halt.h>
static struct { u32 cpuid; @@ -106,6 +109,7 @@ static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; + u32 microcode_ver;
index = 0x80000000; cpuidr = cpuid(index); @@ -137,9 +141,20 @@ } }
+ microcode_ver = get_current_microcode_rev(); printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, get_current_microcode_rev()); + cpu_id, cpu_type, microcode_ver); + + if(microcode_ver == 0x0) { + printk(BIOS_DEBUG, "CPU: ucode is not loaded, Disable top swap\n"); + if (CONFIG(INTEL_TOP_SWAP_MULTI_FIT_UCODE_UPDATE)) { + configure_rtc_buc_top_swap(TS_DISABLE); + printk(BIOS_DEBUG, "CPU: Booting with top swap disabled\n"); + do_board_reset(); + halt(); + } + }
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46647 )
Change subject: [WIP] soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46647/2/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/46647/2/src/soc/intel/tigerlake/boo... PS2, Line 149: if(microcode_ver == 0x0) { space required before the open parenthesis '('
Hello build bot (Jenkins), Rizwan Qureshi, Sridhar Siricilla, Raj Astekar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46647
to look at the new patch set (#3).
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
soc/intel/tigerlake: Configure top swap based on microcode version
In case of firmware interface table based firmware update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
BUG=b:149547271 TEST=Build and boot volteer2 to OS
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: I25febfd946d5a82b92ba626e487eb183a0bd6286 --- M src/soc/intel/tigerlake/bootblock/report_platform.c 1 file changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46647/3
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46647 )
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46647/3/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/46647/3/src/soc/intel/tigerlake/boo... PS3, Line 149: microcode_ver == 0x0 Does CAR even work if microcode is not updated? Does it reliably reach this point?
https://review.coreboot.org/c/coreboot/+/46647/3/src/soc/intel/tigerlake/boo... PS3, Line 154: do_board_reset(); Is there a better place for this check? I feel like rebooting in a function called "report_..." is weird?
Hello build bot (Jenkins), Rizwan Qureshi, Sridhar Siricilla, Raj Astekar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46647
to look at the new patch set (#4).
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
soc/intel/tigerlake: Configure top swap based on microcode version
In case of firmware interface table based firmware update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
BUG=b:149547271 TEST=Build and boot volteer2 to OS
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: I25febfd946d5a82b92ba626e487eb183a0bd6286 --- M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/bootblock/bootblock.c 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46647/4
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46647 )
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/46647/4/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/46647/4/src/soc/intel/tigerlake/boo... PS4, Line 28: #if use C code instead of CPP
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46647 )
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46647/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46647/4//COMMIT_MSG@7 PS4, Line 7: soc/intel/tigerlake: Configure top swap based on microcode version Why only TGL?
Hello build bot (Jenkins), Rizwan Qureshi, Sridhar Siricilla, Arthur Heymans, Raj Astekar, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46647
to look at the new patch set (#5).
Change subject: soc/intel/tigerlake: Configure top swap based on microcode version ......................................................................
soc/intel/tigerlake: Configure top swap based on microcode version
In case of firmware interface table based firmware update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
BUG=b:149547271 TEST=Build and boot volteer2 to OS
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: I25febfd946d5a82b92ba626e487eb183a0bd6286 --- M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/bootblock/bootblock.c 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46647/5