Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/picasso: Adjust I2C ASL ......................................................................
soc/picasso: Adjust I2C ASL
Clarify names as I2C2, etc. Use iomap.h defines for base addresses. Update IRQs.
Change-Id: I3800592e4b0bcb681d0dcf24f69e269f845be025 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/picasso/i2c.c 2 files changed, 22 insertions(+), 38 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/34915/1
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 13b9025..680f496 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -113,43 +113,13 @@ } }
-Device (I2CA) { - Name (_HID, "AMD0010") - Name (_UID, 0x0) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 3 } - Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000) - }) - - Method (_STA, 0x0, NotSerialized) - { - Return (0x0F) - } -} - -Device (I2CB) -{ - Name (_HID, "AMD0010") - Name (_UID, 0x1) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 15 } - Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000) - }) - Method (_STA, 0x0, NotSerialized) - { - Return (0x0F) - } -} - -Device (I2CC) { +Device (I2C2) { Name (_HID, "AMD0010") Name (_UID, 0x2) Name (_CRS, ResourceTemplate() { - IRQ (Edge, ActiveHigh, Exclusive) { 6 } - Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000) + IRQ (Edge, ActiveHigh, Exclusive) { 4 } + Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) })
Method (_STA, 0x0, NotSerialized) @@ -158,13 +128,27 @@ } }
-Device (I2CD) +Device (I2C3) { Name (_HID, "AMD0010") Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { + IRQ (Edge, ActiveHigh, Exclusive) { 6 } + Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000) + }) + Method (_STA, 0x0, NotSerialized) + { + Return (0x0F) + } +} + +Device (I2C4) +{ + Name (_HID, "AMD0010") + Name (_UID, 0x4) + Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 14 } - Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000) + Memory32Fixed(ReadWrite, APU_I2C4_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) { diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index 8786643..bcdf385 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -73,11 +73,11 @@ { switch (dev->path.mmio.addr) { case APU_I2C2_BASE: - return "I2CC"; + return "I2C2"; case APU_I2C3_BASE: - return "I2CD"; + return "I2C3"; case APU_I2C4_BASE: - return "I2CE"; + return "I2C4"; default: return NULL; }
Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/picasso: Adjust I2C ASL ......................................................................
Patch Set 4: Code-Review+2
Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/picasso: Adjust I2C ASL ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... File src/soc/amd/picasso/acpi/sb_fch.asl:
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... PS5, Line 118: 0x2 nitpick... maybe renumber _UID to start at 0 again.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/picasso: Adjust I2C ASL ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... File src/soc/amd/picasso/acpi/sb_fch.asl:
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... PS5, Line 118: 0x2
nitpick... maybe renumber _UID to start at 0 again.
I kind of prefer matching it to the I2C bus number instead. AFAIK this value only needs to be unique.
Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/picasso: Adjust I2C ASL ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... File src/soc/amd/picasso/acpi/sb_fch.asl:
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... PS5, Line 118: 0x2
I kind of prefer matching it to the I2C bus number instead. […]
I'm okay either way... that's why I +2 and said it was nitpick...
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/amd/picasso: Adjust I2C ASL ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... File src/soc/amd/picasso/acpi/sb_fch.asl:
https://review.coreboot.org/c/coreboot/+/34915/5/src/soc/amd/picasso/acpi/sb... PS5, Line 118: 0x2
I'm okay either way... that's why I +2 and said it was nitpick...
Ack
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/amd/picasso: Adjust I2C ASL ......................................................................
Patch Set 6: Code-Review+2
Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/34915 )
Change subject: soc/amd/picasso: Adjust I2C ASL ......................................................................
soc/amd/picasso: Adjust I2C ASL
Clarify names as I2C2, etc. Use iomap.h defines for base addresses. Update IRQs.
Change-Id: I3800592e4b0bcb681d0dcf24f69e269f845be025 Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34915 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com --- M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/picasso/i2c.c 2 files changed, 22 insertions(+), 38 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 13b9025..680f496 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -113,43 +113,13 @@ } }
-Device (I2CA) { - Name (_HID, "AMD0010") - Name (_UID, 0x0) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 3 } - Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000) - }) - - Method (_STA, 0x0, NotSerialized) - { - Return (0x0F) - } -} - -Device (I2CB) -{ - Name (_HID, "AMD0010") - Name (_UID, 0x1) - Name (_CRS, ResourceTemplate() - { - IRQ (Edge, ActiveHigh, Exclusive) { 15 } - Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000) - }) - Method (_STA, 0x0, NotSerialized) - { - Return (0x0F) - } -} - -Device (I2CC) { +Device (I2C2) { Name (_HID, "AMD0010") Name (_UID, 0x2) Name (_CRS, ResourceTemplate() { - IRQ (Edge, ActiveHigh, Exclusive) { 6 } - Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000) + IRQ (Edge, ActiveHigh, Exclusive) { 4 } + Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) })
Method (_STA, 0x0, NotSerialized) @@ -158,13 +128,27 @@ } }
-Device (I2CD) +Device (I2C3) { Name (_HID, "AMD0010") Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { + IRQ (Edge, ActiveHigh, Exclusive) { 6 } + Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000) + }) + Method (_STA, 0x0, NotSerialized) + { + Return (0x0F) + } +} + +Device (I2C4) +{ + Name (_HID, "AMD0010") + Name (_UID, 0x4) + Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 14 } - Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000) + Memory32Fixed(ReadWrite, APU_I2C4_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) { diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index 8786643..bcdf385 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -73,11 +73,11 @@ { switch (dev->path.mmio.addr) { case APU_I2C2_BASE: - return "I2CC"; + return "I2C2"; case APU_I2C3_BASE: - return "I2CD"; + return "I2C3"; case APU_I2C4_BASE: - return "I2CE"; + return "I2C4"; default: return NULL; }
-
Marshall Dawson (Code Review) -
Martin Roth (Code Review)
-
Richard Spiegel (Code Review)