Change in coreboot[master]: soc/amd/common/acpi/lpc.asl: Remove Math Coprocessor

[Raul Rangel (Code Review)]

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50921 )

Change subject: soc/amd/common/acpi/lpc.asl: Remove Math Coprocessor
......................................................................

soc/amd/common/acpi/lpc.asl: Remove Math Coprocessor

0xF0 is the NCP Error register for Stoney, Picasso, and Cezanne. There
is no Math Coprocessor.

Signed-off-by: Raul E Rangel 
Change-Id: I38687c13a54ef7325df0d55ad8b465b3b0adc2cc
---
M src/soc/amd/common/acpi/lpc.asl
1 file changed, 0 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/50921/1

diff --git a/src/soc/amd/common/acpi/lpc.asl b/src/soc/amd/common/acpi/lpc.asl
index 254fc69..66031a5 100644
--- a/src/soc/amd/common/acpi/lpc.asl
+++ b/src/soc/amd/common/acpi/lpc.asl
@@ -96,12 +96,4 @@
    		IO(Decode16, 0x00c0, 0x00c0, 0x10, 0x20)
    	}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
    } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
-
-	Device(COPR) {
-		Name(_HID,EISAID("PNP0C04"))	/* Math Coprocessor */
-		Name(_CRS, ResourceTemplate() {
-			IO(Decode16, 0x00f0, 0x00f0, 0, 0x10)
-			IRQNoFlags(){13}
-		})
-	} /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
 } /* end LPCB */